Semiconductor Process Integration Engineering - Technical Manager

Job Description

Talent Matrixx has engaged to recruit for the most technologically advanced semiconductor manufacturing company in the world, located in Phoenix, Arizona. Our client is engaged with the world’s most brilliant innovators to transform ideas into world-changing products. We are searching for people who share the same vision!

Ideal candidates will be technical managers with the drive to learn and implement 4nm technology at this Fab. We promote from within, and with our planned growth in Phoenix, you’ll be in the best position to grow with us.

Job Description

General responsibility of the Semiconductor Process Integration Engineering - Technical Manager.

Supervise 5 to 15 engineers sustaining, drive continuous process improvement, develop and enhance the skills of the local work force.

Your team will own a process section loop and you will have responsibilities for your loop integrated targets for Yield, Performance, Reliability targets.

You will lead your team to partner with Defect Metrology, Process, Equipment and Manufacturing engineering in identify and driving process improvements to meet Performance, Reliability, Defect, Cost, and Productivity goals

Experience Requirements

Must be eligible to work in the US without visa sponsorship

2+ Management experience. Acountable for hiring, mentoring and managing performance. Not a lead, supervisor or matrix manager

4+ years of High Volume Manufacturing Semiconductor experience

Candidate should have expert understanding of CMOS FinFET process, or advance BEOL Cu Damascene flow.

FEOL candidates must have experience in R/D or manufacturing sustaining, improvement of one or more process loops: Isolation, Poly, EPI, RMG, or Contact Loop.

BEOL candidates must have experience in Dual Damascene processing and deep expertise in the materials aspects that impact BEOL performance, yield and reliability.

Bachelor, Master or Ph.D. in Materials Science, Electrical Engineering, Chemical Engineering, Mechanical Engineering, or related field.

Training trip to Taiwan – 6-9 months to learn process technology

We are willing to train you on our advanced 4 and 2 nm technology

OPEN Manager positions

Semiconductor Process Integration Engineering - Technical Manager

Photolithography Engineering Manager

YED Yield Excellence Manager

(CVD) Module Engineering Manager

(PVD) Module Engineering Manager

CMP Module Engineering Manager

Dry Etching Process Engineering Manager

AMHS Manager

Powered by JazzHR

HWTPU1tJAc