Design Verification Engineer

*W2 Only, No C2C/third parties*

Position: Physical Design Verification Engineer

Location: Sunnyvale, CA (onsite)

Duration: 7-month contract

Experience level: 10-15 years

What You'll Be Doing:

EM/IR analysis and fixing for digital and Analog designs.

Flow Development for ANSYS Tool for IR/EM analysis for analog design.

Calibre Extraction for full custom chips.

Power/Ground planning and/or analysis for full custom chips.

SPICE Simulation

What We Are Looking For:

BS or MS in Engineering (or equivalent)

Strong fundamental knowledge of EM/IR.

Worked on Analog chips as well as Digital chips for EM/IR.

Worked on PDN network analysis and methodology for block and chip level.

ANSYS tools flow for full Custom/Analog design.

Redhawk/Totem tool experience is preferred.

Familiarity with Finesim or SPICE.

Calibre Extraction or RC extraction for a full custom chip.

Power/ground planning and/or analysis for a full custom chip

Education:

Bachelor's / Master's / PhD