Analog Design Engineer

Mandatory Skills:

Experience in Standard Cell Circuit design/Characterization/Layout of various Standard cells and Macros (viz. flip flops, latches, multibit flip flops, level shifters, Power Switch Cells, Retention flops, Synchronizer cells etc.) in planer and non-planar technology nodes.

Overview of circuit and MC simulations, Layout Dependent effects, RTL2GDS flow.

Good understanding of CMOS and FinFET technologies.

Good understanding of State of the art EDA tools from Siemens, Cadence and Synopsys including Simulation, and Characterization work.

Contribute in the improvement/development of circuit design, Characterization of StdCell libraries.

Implement Innovative solutions within Standard cell library development domain.

Develop EDA views including Characterization of NLDM, CCSP. CCSN and AOCV, LVF for standard cell libraries

Affinity to automation and working Knowledge of Python.

Full time