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Analog Design Staff Engineer

Company:
Synopsys
Location:
VasanthaNagar, Karnataka, 560001, India
Posted:
April 29, 2024
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Description:

DDR I/O Circuit design

Requirements-

BTech/MTech

Knowledge of CMOS processes and issues in deep submicron process technologies.

CMOS circuit design and layout methodology & flow; basic understanding of analog/mixed signal circuitry, familiarity with basic ESD concepts is an advantage.

Familiarity with ASIC design flow.

Knowledge of JEDEC requirements for DDR interfaces & standards, DDR Timing, ODT and SDRAM functionality would be a plus.

Ability to execute assigned circuit design tasks with best product quality and efficiency.

Good written and verbal communication skills in interactions with internal development teams.

Full time

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