Design Verification Lead - UVM/System Verilog

Design Verification Lead (8-12 years) We are seeking a skilled Design Verification Lead with hands-on experience in live projects.

If you have a passion for developing functional verification environments, excellent debugging skills, and a collaborative mindset, we invite you to join our dynamic team in Bangalore or Cochin Responsibilities : - Develop and implement comprehensive functional verification environments, including monitors, checkers, scoreboards, and assertions - Utilize expertise in AMBA bus protocols, ARM CPU, and optionally PCI Express and/or Ethernet bus protocols to ensure robust verification processes - Collaborate with cross-functional teams to integrate and troubleshoot verification components within the overall system - Employ scripting languages (PERL/Python/Shell/Makefile) for automation and efficiency in verification processes - Contribute to the overall success of the team by actively participating in debugging sessions, providing valuable insights, and maintaining effective communication within the team.

Requirements/Skills : - Strong System Verilog/UVM knowledge with practical experience on live projects - Expertise in AMBA bus protocols, ARM CPU, and experience in PCI Express and/or Ethernet bus protocols (desirable) - Proficiency in Unix, Configuration Management, Bug tracking, and verification dashboarding tools - Experience in developing functional verification environments, including components like monitors, checkers, scoreboards, and assertions, along with knowledge of verification methodologies using random stimulus and functional coverage.

Preferred Skills : - Proficiency in scripting languages such as PERL, Python, Shell, or Makefile - Demonstrated ability in debugging and problem-solving - Excellent communication skills with a collaborative and team-oriented mindset Educational Qualifications : - BE/ME or BTech /MTech (ref:hirist.tech)