Candidate should be with strong HW validation experience. Should have performed HW validation with Board-to-board (with AMD FPGAs), Board-to-Tester (IXIA, VIAVI, XENA etc). Sound knowledge on PS based (CIPS / ublaze) sub-system design and its HW testing. Knowledge on IBERT, SFP/SFP+, QSFP, QSFP-DD connectors and testing with these interfaces. Strong knowledge on Ethernet IPs or Ethernet protocol domain. Knowledge in any of the scripting languages TCL/Perl/python is a plus. Good Knowledge of AXI Protocols. Good communication skills and experience working with different teams. Experience on FPGA methodology/technology is a plus
Exp - 6+
Immediate
Hyderabad