Verification Lead

Greetings From Tessolve Semiconductors.

A widely leading core semiconductor company in world wide.

We Are Hiring

Engineers who's having strong experience and eager to learn advanced Complete ASIC Front End Design techniques.

Location: Coimbatore

Minimum 10 yrs to 15+ years of experience as Digital Verification Engineer with System Verilog / UVM

JD 1:

• Good understanding of Arm Based SoCs

o SoC Bus backbone ( ARM NIC, CCN, Bridges, DRAM memory controllers and cache coherency concepts)

o SoC bus components like MMU, Quality Enhancer.

o Good understanding of SoC Power Management and Clock management.

o Experience in at least ONE of these blocks: Amba, Bus Interconnect, Memory interface ( DRAM and LPDDR4 ), PCIE, Ethernet, CAN, UFS, eMMC, Camera MIPI CSI/DSI, DP, ISP, USB, Security Subsystem including ARM TrustZone, GPU, Audio, Video, ARM CPU and Design For Debug ( DFD), peripherals interfaces - UART, I2C, I2S, SPI, flash memory interfaces verification at sub-system/Full-chip level.

o Experience with SOC Bus protocols: AMBA Bus interfaces (AXI, AHB, APB) and/or OCP highly desirable.

• Must have excellent knowledge of ASIC Verification Flow

• Experience with current verification methodologies (UVM, OVM, VMM, Specman, ...)

• Should have SoC level verification experience. ( Build complex testbench environments and identifying corner case scenarios and exposing Arch/corner case bugs)

• Experience in power aware and Low Power management verification.

• Experience in Performance Verification with Emulators is plus.

• Experience with coverage based verification methodologies.

• Excellent debug skills in both functional ( Should be able to Rootcause the issue)

• Familiarity with scripting languages likes Perl, Phython

• Experience with setting up and running gate level simulations

JD 2:

Ø Excellent at scripts, C++/UVM OOP languages

Ø Experience in Verilog and System Verilog languages

Ø Strong understanding of computer architecture and ASIC design flow

Ø Experience with bus protocols (AXI, AHB, other)

Ø Experience with AMD flows and methodologies preferred

Ø Experience with hands on IP integrations into SOC is highly desired.

Ø Excellent debug skills.

Ø Familiar with Linux Environment (including shell scripting and Linux GNU tools)

Ø Experience with assertion-based design strategies, code coverage, functional coverage and test plan development.

Ø Should have excellent communication skills (both written and oral)

Ø Strong problem-solving skills

About us: Tessolve Semiconductors, a venture of Hero Electronix, is a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions. Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, spec to the product. With 2500+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs. Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. We have a global presence with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, China, UK, Japan, Thailand, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose. Tessolve offers a highly competitive compensation and benefits along with an electric work environment to scale one’s intellect, skills and growth.

Interested candidates can share your resume to

Disclaimer:

At Tessolve, we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success. We are dedicated to creating an inclusive environment where all employees, regardless of their race, colour, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected. We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth.