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Performance Modeling Engineer

Company:
Acceler8 Talent
Location:
Santa Clara, CA, 95053
Posted:
May 15, 2026
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Description:

Sr/Principal Software Engineer – Simulator Developer

Location: Santa Clara, CA Onsite

A VC-backed, stealth-mode startup is building rack-level AI inference systems. The company’s differentiated SoC enables system-level innovations designed to maximize efficiency for data center-scale inference serving. The team is seeking highly skilled and motivated engineers to help build hardware and develop or extend open-source software to serve leading-edge models with extreme efficiency.

What You'll Do:

Lead or contribute as a member of a small team, depending on experience, developing performance and/or functional models that guide architecture decisions and accelerate hardware-software co-design in a fast-moving startup environment.

Responsibilities

Design, implement, and maintain processor simulators, including performance and/or functional models

Model microarchitectural components such as pipelines, memory hierarchy, interconnects, and accelerators

Generate and curate traces to support targeted performance analysis goals

Analyze simulation results to inform architecture tradeoffs and optimizations

Collaborate closely with architecture, hardware, and compiler teams

Own critical simulation infrastructure from concept through production use

Experience

5+ years of software engineering experience, ideally in systems, architecture, or EDA domains

Strong C/C++ and Python skills with experience in large, complex codebases

Experience with processor simulators, architectural modeling, or performance analysis, especially from-scratch simulator development

Solid understanding of computer architecture and microarchitecture

Ability to work independently and make technical decisions in an early-stage startup environment

Nice to Have

Experience with AI/ML accelerators, GPUs, or heterogeneous systems

Familiarity with simulators such as gem5, gem5-SALAM, or proprietary modeling tools

Background in hardware-software co-design or compilers

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