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Senior Package Design Engineer

Company:
VIIS Global
Location:
Sunnyvale, CA, 94088
Posted:
May 02, 2026
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Description:

Job Description

Role Summary:

We are seeking a Senior Package Design Engineer to join our custom SOC/ASIC development client. You’ll work closely with cross-functional teams in the U.S. and overseas on high-performance package substrate design with a focus on signal/power integrity and routing.

Key Responsibilities:

Perform package substrate design and analysis (SI/PI/routing)

Collaborate with layout engineers, marketing, and global design teams

Use tools like HFSS, ADS for package modeling/simulation

Contribute during pre/post-sales processes

Qualifications:

BS in EE or related field; MS preferred

8–10 years of experience in semiconductor package design

Strong SI/PI analysis, modeling, and simulation skills

Excellent communication, teamwork, and presentation abilities

Preferred Skills:

Expertise in high-speed package/PCB design (SerDes, PCIe, LPDDR, Ethernet)

Time/frequency domain analysis, impedance, jitter, eye-diagram, BER analysis

Experience with Hspice, Redhawk, electro-thermal simulation, PDN modeling

Familiarity with reliability analysis and packaging/assembly rules

Full-time

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