Synthesis Tools Engineer FPGA Focus

Join Altera in Toronto, Ontario, and lead the way in FPGA compilation as a Synthesis Tools Engineer.

Leverage your RTL and software skills to enhance development tools and methodologies.

In this role, you'll focus on synthesizing RTL designs into optimized hardware, contributing over 6 years of FPGA/ASIC design experience.

Your expertise in Verilog, SystemVerilog, or VHDL will help refine FPGA compilation technology and drive performance improvements across the toolchain.

Key Responsibilities: • Develop synthesis algorithms for efficient RTL to gate-level conversion • Integrate and improve synthesis within the FPGA compiler flow • Optimize area, performance, and power using innovative techniques • Analyze and transform complex RTL designs with new tools • Collaborate with teams to ensure toolchain alignment Requirements: • 6+ years in FPGA or EDA-related fields • Strong background in RTL design and synthesis • Proficiency in C/C++ for tool development • Knowledge of timing-driven design and logic optimization • Educational background in relevant engineering fields Drive advancements in synthesis tools with Altera, enhancing FPGA capabilities in modern applications.

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