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ATE Test Engineer

Company:
TetraMem Inc
Location:
San Jose, CA, 95131
Posted:
February 10, 2026
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Description:

Responsibilities:

Develop, debug, and release ATE test programs on Teradyne J750 and UltraFLEXplus using IG-XL

Own tester setup, configuration, and correlation from bench to ATE

Support facility and tester infrastructure bring-up (power, cooling, networking, safety, handler/prober integration)

Drive test coverage, yield, and throughput optimization for mass production

Lead test transfer from NPI to HVM, including guardbanding and cost reduction

Collaborate with design, validation, and product teams on testability and debug

Interface with OSATs and external vendors for test development, qualification, and ramp

Support failure analysis, silicon debug, and yield excursions in production

Requirements:

Hands-on experience with Teradyne J750 and/or UltraFLEXplus

Strong proficiency in IG-XL (test flow, timing, levels, binning, datalogging)

Solid understanding of ATE hardware, load boards, handlers/probers, and DIBs

Experience bringing tests into high-volume manufacturing

Proven ability to work with OSATs and test vendors

Knowledge of DFT concepts (scan, MBIST, IDDQ, etc.) is a plus

Strong debug, ownership, and cross-functional communication skills

Nice to Have:

Multi-site optimization and test time reduction

Yield analysis and data mining

Experience across NPI -> MP lifecycle

Salary Range: $130,000 - $250,000

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