OUR STORY At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society.
As a global semiconductor company, our advanced technologies and chips form the hidden foundation of the world we live in today.
When you join ST, you will be part of a global business with more than 115 nationalities, present in 40 countries, and comprising over 50,000 diverse and dedicated creators and makers of technology around the world.
Developing technologies takes more than talent: it takes amazing people who understand collaboration and respect.
People with passion and the desire to disrupt the status quo, drive innovation, and unlock their own potential.
Embark on a journey with us, where you can innovate for a future that we want to make smarter and greener, in a responsible and sustainable way.
Our technology starts with you.
YOUR ROLE Job Description Our ICs are based on standard CMOS processes containing large digital blocks and precision analog circuits.
As an Analog Layout Engineer, you are passionate about CMOS IC Mask layout incorporating efficient, well-matched, and low offset layout techniques.
Circuits covered include linear and switching voltage regulators, high speed A/D and D/A data converters, PLLs, comparators, op-amps, and control logic circuits.
You will be familiar with ratio-matching, IR drop, and noise coupling as they relate to analog layout.
Responsibilities will cover floor planning, physical layout, routing, verification, and final tapeout.
The ideal candidate will be familiar with backend verification tools and will have a good understanding of DRC/LVS/ERC/ANT, extraction of parasitic devices, and integration of digital and analog blocks.
Device physics knowledge is a strong plus.
The candidate must be able to handle the complexities associated with best layout for lowest cost and maximize silicon area usage This will be Hybrid working role based out of ST's office in Coppell (part of Dallas Fort worth area) Texas.
YOUR SKILLS & EXPERIENCES * Bachelor degree.
* 5 years or more of Analog layout experience.
* Analog Design Basics, * Physical verification (DRC, LVS, ERC & DFM) * Proficiency in Layout design environment and EDA tools (Cadence Virtuoso, Mentor Graphics etc.) * Proficiency in debugging layout errors.
* ESD, Electromigration, Self-heating & IR Drop along with RC Delay, Matching & Decoupling.
* IC Technology (Fabrication, layout techniques, deep sub-micron effects, Layout design rules). * Design for Manufacturing.
* Component placement, auto-routing.
* Routing Techniques: Shielding, Isolation etc.
* Tapeout and sign-off experience.
* Power Integrity (power routing to ensure stable & clean power to analog components). * Layout development in multiple technologies & nodes.
* Scripting (SKILL, Perl, TCL). * IC Packaging & CPI.
At STMicroelectronics, base salary is one part of our total compensation package and is determined within a range depending on your skills, qualifications, experience, and location.
The base annual salary range for this role is between $117,900 - $147,400 USD ST is proud to be one of the 17 companies certified as a 2025 Global Top Employer and the first and only semiconductor company to achieve this distinction.
ST was recognized in this ranking thanks to its continuous improvement approach and stands out particularly in the areas of ethics & integrity, purpose & values, organization & change, business strategy, and performance.
At ST, we endeavor to foster a diverse and inclusive workplace, and we do not tolerate discrimination.
We aim to recruit and retain a diverse workforce that reflects the societies around us.
We strive for equity in career development, career opportunities, and equal remuneration.
We encourage candidates who may not meet every single requirement to apply, as we appreciate diverse perspectives and provide opportunities for growth and learning.
Diversity, equity, and inclusion (DEI) is woven into our company culture.
To discover more, visit st.com/careers.