ASIC Design Engineer

Responsibilities: * Member of design team for large SOCs Qualifications: * BS/MS degree and 0-5 years of work experience * Good understanding of digital design and verification practices from course work or job experience * Ability to write Verilog RTL and basic knowledge or experience with simulations * Familiarity with high-speed protocols such as USB3 or PCIe is a desirable Experience: * Demonstrate a basic knowledge of System Verilog (SV) or similar verification language * Demonstrate a basic knowledge of Verilog for chip design and verification * Experience with high-speed serial protocols (USB3, PCIe, Ethernet, etc.) * Relevant course work for VLSI/ASIC design