| Resume alert | Resumes 41 - 50 of 106 |
Design engineer
Gaithersburg, MD
... Robot Event -Innovate 2011 Work Experience ASIC Design Engineer Jan 2015 to Jun 2015 ST MICROELECTRONICS • Assisted in ramping the design for multiple projects and carried out the entire design flow from RTL Coding using VHDL till the Signoff stage. ... - 2015 Sep 19
... Robot Event -Innovate 2011 Work Experience ASIC Design Engineer Jan 2015 to Jun 2015 ST MICROELECTRONICS • Assisted in ramping the design for multiple projects and carried out the entire design flow from RTL Coding using VHDL till the Signoff stage. ... - 2015 Sep 19
Training Industrial
Ashburn, VA
... Work Experience Fresher Software proficiency Office suite: MS-office,MS-excel Area of Interest Automation VLSI designing PLC Automation TRANING 2 months industrial training in Embedded system, at CETPA infotech, Mohali. 6 month industrial training ... - 2015 Sep 02
... Work Experience Fresher Software proficiency Office suite: MS-office,MS-excel Area of Interest Automation VLSI designing PLC Automation TRANING 2 months industrial training in Embedded system, at CETPA infotech, Mohali. 6 month industrial training ... - 2015 Sep 02
Computer Engineer
Centreville, VA
... in functional and technical specification documents RELATED COURSEWORK: Electrical and Computer Engineering Courses: FPGA and ASIC Design with VHDL (Xilinx ISE) Single-Chip Microcomputers (Microcontrollers) Humanoid Robotics (Linux shell, Git, ... - 2015 Jun 04
... in functional and technical specification documents RELATED COURSEWORK: Electrical and Computer Engineering Courses: FPGA and ASIC Design with VHDL (Xilinx ISE) Single-Chip Microcomputers (Microcontrollers) Humanoid Robotics (Linux shell, Git, ... - 2015 Jun 04
Project Design
Oakton, VA
... ASIC/FPGA Design, Verification, Synthesis . Complex FPGA Implementations . Design of Cryptographic modules and DSP hardware ... George Mason University, VA, USA Advanced Post Graduate Diploma in VLSI from VEDANT, SCL India, Mohali, India Bachelor of ... - 2015 Feb 27
... ASIC/FPGA Design, Verification, Synthesis . Complex FPGA Implementations . Design of Cryptographic modules and DSP hardware ... George Mason University, VA, USA Advanced Post Graduate Diploma in VLSI from VEDANT, SCL India, Mohali, India Bachelor of ... - 2015 Feb 27
Engineering Design
Herndon, VA
... ACADEMIC PROFILE: M.E(VLSI DESIGN) Year University CGPA Shivani college of 2012-2014 Engineering and 6.96 Technology -Trichy ... TOOLS USED: FHSS M.E PROJECTS: TITLE: FPGA IMPLEMENTATION OF FAST QR DECOMPOSITION BASED ON GIVENS ROTATION ABSTRACT A ... - 2015 Jan 13
... ACADEMIC PROFILE: M.E(VLSI DESIGN) Year University CGPA Shivani college of 2012-2014 Engineering and 6.96 Technology -Trichy ... TOOLS USED: FHSS M.E PROJECTS: TITLE: FPGA IMPLEMENTATION OF FAST QR DECOMPOSITION BASED ON GIVENS ROTATION ABSTRACT A ... - 2015 Jan 13
Engineer Design
Washington, DC
... acgpa3@r.postjobfree.com OBJECTIVE Seeking engineering position on Hardware/Embedded system/FPGA design and firmware coding. ... to Cooktop Audio (274770-1/GECA-606) Senior Design Engineer ST Microelectronics, Phoenix, 2000 - 2011 STM32 (ARM core) ... - 2014 Nov 12
... acgpa3@r.postjobfree.com OBJECTIVE Seeking engineering position on Hardware/Embedded system/FPGA design and firmware coding. ... to Cooktop Audio (274770-1/GECA-606) Senior Design Engineer ST Microelectronics, Phoenix, 2000 - 2011 STM32 (ARM core) ... - 2014 Nov 12
flexibility and adaptability to any situation, enthusiastic learn
Ashburn, VA
... Easily detects and given alerts of using mobile phone COMPUTER EFFICIENCY: - Area of Interest : Wireless networking and telecommunication, Embedded Systems, - Packages known : MATLAB,VLSI, C, C+ +, MS OFFICE (Word, Power point, Excel), PERSONNEL ... - 2014 Oct 06
... Easily detects and given alerts of using mobile phone COMPUTER EFFICIENCY: - Area of Interest : Wireless networking and telecommunication, Embedded Systems, - Packages known : MATLAB,VLSI, C, C+ +, MS OFFICE (Word, Power point, Excel), PERSONNEL ... - 2014 Oct 06
Thermal Power Engineering
Chevy Chase, MD
... ACADEMIC EXPERIENCE BRAIN SEIZURE DETECTION USING FPGA (SPRING 2014) - A machine learning algorithm was devised for detection of brain seizure detection t ested and implemented in Verilog in Xilinx IDE and Matlab. - The brain seizure data was sent ... - 2014 Sep 27
... ACADEMIC EXPERIENCE BRAIN SEIZURE DETECTION USING FPGA (SPRING 2014) - A machine learning algorithm was devised for detection of brain seizure detection t ested and implemented in Verilog in Xilinx IDE and Matlab. - The brain seizure data was sent ... - 2014 Sep 27
Senior Design Engineer
Herndon, VA
... Hou *** ****** ******, *******, ** ***** E-mail: acf3pr@r.postjobfree.com, tel: 913-***-**** Summary: Over 8 years experience in FPGA design using VHDL; 8 years experience in real time embedded programming using C and assembly; 3 years RF and ... - 2014 Sep 23
... Hou *** ****** ******, *******, ** ***** E-mail: acf3pr@r.postjobfree.com, tel: 913-***-**** Summary: Over 8 years experience in FPGA design using VHDL; 8 years experience in real time embedded programming using C and assembly; 3 years RF and ... - 2014 Sep 23
Project Mechanical
Ashburn, VA
... COURSE BOARD\UNIVERSIT YEAR OF PERCENTAGE Y PASSING BE Visvesvaraya Technological 2014 65 University, Karnataka 12th State 2010 74.68 10th ICSE 2008 65 Technical skills: Programming languages: C, C++, VHDL, Verilog, Embedded C,DSP,VLSI. ... - 2014 Sep 19
... COURSE BOARD\UNIVERSIT YEAR OF PERCENTAGE Y PASSING BE Visvesvaraya Technological 2014 65 University, Karnataka 12th State 2010 74.68 10th ICSE 2008 65 Technical skills: Programming languages: C, C++, VHDL, Verilog, Embedded C,DSP,VLSI. ... - 2014 Sep 19