RESUME

MAHENDRA PANDIAN.M

North Street,

Malaipatti,

Tirunelveli,

Pin code: 627754.

Email:abg7md@r.postjobfree.com.

Phone no: 975*******.

OBJECTIVE:

To be a part of an organization where one can utilize my inherent talent, to contribute my Skills

to the Organization’s vision and mission, and to grow along with the organization.

ACADEMIC PROFILE:

M.E(VLSI DESIGN)

Year University CGPA

Shivani college of

2012-2014 Engineering and 6.96

Technology -Trichy

B.E (ECE)

Year University CGPA

University college of

2008-2012 Engineering, 7.063

Anna university.

12th (State Board)

Year School Percentage

2007-2008 R.C.susai higher secondary 84.16

school, kalugumalai

10th(State Board)

Year School Percentage

2005-2006 R.C.susai higher secondary 66.8

school, kalugumalai

TRAINING:

• Have attended a one week Industrial Training at “BSNL” in Madurai.

• Have attended an one day Industrial Training at “NLC”

B.E PROJECTS:

TITLE: UWB ANTENNA DESIGN

ABSTRACT

UWB(Ultra wide band) is a radio frequency technology .which has a fractional bandwidth of

greater than 0.25.The spectrum of UWB ranges from 3.1-10.6GHz.Microstrip antennas are the

patches antennas, which have patches made on the dielectric surface which is grounded. Hence

these antennas are called as patch antenna. It comes under the category of printed antenna.

The proposed work is to design a micro-strip antenna for UWB applications &

Fabricate the same. A prototype has been designed in FHSS using FR4 substrate (1.6mm

thick).The antenna has a width of 29mm & a length of 25mm.The simulation results obtained

shows that the designed antenna has a less return loss, high gain and high directivity. Also, the

current density pattern &VSWR obtained prove the effectiveness of the proposed antenna.

TOOLS USED: FHSS

M.E PROJECTS:

TITLE: FPGA IMPLEMENTATION OF FAST QR DECOMPOSITION BASED

ON GIVENS ROTATION

ABSTRACT

A Givens Rotation algorithm is implemented by using a folded systolic array and the

CORDIC algorithm, making this very suitable for high-speed FPGAs or ASIC designs.

Design a high speed QR decomposition system to reduce area and power with parallel

configuration method Speed of operation can be more than 300MHZ as mentioned in

earlier research Configurable Platform makes code reusability Flexible design blocks

which reduce area and logic utilization

SKILL SET:

Areas of Interest : DIGITAL ELECTRONICS

Languages : C, C++.

OS : Windows 07 / XP

EXTRA-CURRICULAR ACHEIVEMENTS:

EVENT LEVEL PLACE

SWIMMING DIVISIONAL THIRD

POLE VAULT DISTIRCT FIRST

POLE VAULT ZONAL FIRST

KABBADI BLOCK RUNNER

PERSONAL DETAILS:

Name : MAHENDRA PANDIAN.M

DOB : 20.07.1991

Father’s Name : MARIAPPAN.A

Mother’s Name : POONGANI.M

Gender : MALE

Marital Status : Single

Nationality : Indian

Strengths : Goal oriented, Good in Team work,

Good in inter personal relationship and

communication

Permanent Address : 6/99, North Street,

Malaipatti,

Tirunelveli.

Contact Number : +91-975*******

DECLARATION:

I hereby declare that the above written particulars are true to the best of my knowledge and belief.

REFERENCES:

1. Dr.K.Venkatalakshmi, M.E., Ph.D.,

Head of the Department,

Department of Electronics and Communication Engineering,

University College of Engineering Tindivanam,

Melpakkam, Tindivanam-604001,

Mobile: +91-959*******. Best time to call: 5 PM to 8 PM

2.S.Janarthanam, M.E.,

Assistant Professor,

Department of Electronics and Communication Engineering,

University College of Engineering Tindivanam,

Melpakkam, Tindivanam-604001,

Mobile: +91-967*******. Best time to call: 6 PM to 8 PM

Date: Yours truly

Place: (M.MAHENDRA PANDIAN)

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