| Job alert | Jobs 61 - 70 of 2078 |
Senior Design Verification Engineer
Tessolve
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Austin, TX, 78716
... The ideal candidate will have a strong background in SOC level design verification, proficient in System Verilog and UVM methodologies, and possess a deep understanding of the full verification flow including coverage closure. Additionally, ... - Apr 20
Power Designer - Sr. Eng
US Tech Solutions
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Markham, ON, Canada
... · Experienced with Verilog, System Verilog, C and C++ Education: Bachelor/Masters of Science Degree in Electrical Engineering, or Computer Engineering. About US Tech Solutions: US Tech Solutions is a global staff augmentation firm providing a wide ... - Apr 20
Hardware Engineer - FPGA/Verilog
Antal International
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Bengaluru, Karnataka, India
... Familiarity with hardware description languages (HDLs) such as VHDL or Verilog. Controller Systems: Designing and integrating microcontrollers and other control systems into hardware designs. Developing firmware/software for control interfaces and ... - Apr 23
FPGA Engineer-High Frequency Trading
CPS, Inc.
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Chicago, IL, 60606
... - Experience coding in VHDL/ Verilog/ SystemVerilog as well as C or C++ - Experience with RTL synthesis, and other constraints - Experience with debugging is a plus #LI-SN1 - Apr 22
FPGA Development Engineer
Innovative Solutions and Support
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Exton, PA, 19341
... What You Will Do Work in an Engineering environment developing products for the Aviation industry FPGA design using Verilog/System Verilog code Hands-on involvement in circuit board and lab simulations. Provide hardware and software design support ... - Apr 02
FPGA Designer
Curtiss-Wright Corporation
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Canada
... Work from concept development, writing product specifications, test plans, VHDL/Verilog coding right through to simulation. Responsible for FPGA functional allocation, logic design, HDL coding, simulation, synthesis, place & route, and bitstream ... - Apr 23
Design Verification Engineer
Wipro
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Seattle, WA, 98127
5 to 10 years of Experience in pre-silicon RTL Verification /IP Verification / SOC verification Strong knowledge of System Verilog and working knowledge of recent verification methodologies (UVM). Domain expertise in one or more of the following ... - Apr 20
Senior FPGA Engineer
Mindlance
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Gilbert, AZ, 85233
... This position requires expert knowledge of the following items: VHDL ModelSim/Questa Sim Clock Domain Crossing (CDC) Analysis Static Timing Analysis (STA) Self-checking testbenches The position could also involve: System Verilog EEO: “Mindlance is ... - Apr 14
Software Engineer (379555)
Placement Services USA, Inc.
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Palo Alto, CA
$126,984 per year
... create the Universal Verification Methodology (UVM) testbench that is written in System Verilog to verify the functionality and performance of the chip; examine the interrupt, register access, and Direct Memory Access (DMA) functionality in a full ... - Apr 22
Senior FPGA Engineer
Amphib Digital LLC
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Tysons, VA
... Significant experience designing FPGA with VHDL or Verilog. Knowledgeability in software defined radio a huge plus. Programming experience with C, C++, python very useful. MATLAB a huge plus. Agnostic implementation on FPGA systems; focus on COTS ... - Mar 29