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Design Engineer

Chicago, IL
... TECHNICAL SKILLS Programming Languages: C/C++, Python, Embedded C, Verilog, SystemVerilog. Operating System: Windows, Linux, macOS IDE/Tools: Arduino, AVR, MATLAB, Eclipse, LabView, ROS, Cadence Virtuoso, HSpice, ATLANTA-M, KICAD, Altium, Eagle, ... - Nov 17

graduate trainee engineer

Pune, MH, India
... SkillSets Core Knowledge : Microcontroller, Microprocessor,VHDL,Verilog. Language : CORE - JAVA, Adv.JAVA, Servlets, JDBC,C#. Frame Work : Hibernate. Operating System : Windows 2000/XP/windows7 Web Technologies : HTML, CSS,JavaScript. Strengths Work ... - Nov 16

GET

Chennai, TN, India
... School State Board 82.00 SSC 2012 Master’s E.M & T.M High School State Board 9.2 Technical Skills Microsoft Office Basic Computer Skills Basic C/C++ Verilog(Beginner) Softwares known: Xilinx, Model sim, Python, Proteus. Co-curricular Activities ... - Nov 15

Design Engineer

Bengaluru, KA, India
... Experienced in VHDL, Verilog, Xilinx Spartan FPGA programming. Expertise in Digital Design and Advanced Verification Techniques Proficient in RTL design, simulation and synthesis using Xilinx ISE, XST tools. Knowledgeable in CMOS VLSI design, ... - Nov 14

Vhdl,Verilog,Basic C Language,Python,Perl.

AP, 531055, India
... RISC Stored program machine using verilog progrming. Skills : Technical skills : Proficient in RTL design and simulation. Good in VHDL, Verilog HDL programing language. Knowledge in ASIC front end &back end design. Computer skills : Windows,linux Os ... - Nov 14

ASIC Physical Design/Implementation Engineer

Plymouth, MN
... STA and constraint debug on several 90nm SAS RAID-on-Chip(ROC) chips Staff SAS ROC Design Engineer Houston, TX Synthesized verilog RTL with Design Compiler and STA with PrimeTime for 90nm SAS 2.0 ROC chips Wrote and debugged verilog simulation ... - Nov 13

Project System

Nagpur, MH, India
... -Completed C language course, MSCIT and command in office tools, known to VHDL & Verilog language. Projects Delivered: -Implementation of Carotid Occlusion Diagnostic System Using FMRI (M.Tech Project) The purpose of my project is to diagnose the ... - Nov 13

Electrical Engineering Design

San Diego, CA
... TECHNICAL SKILLS VLSI Design Tool : Virtuoso (Cadence), ADS, Spectre RF (Cadence), AFS, EMX, HFSS, NC-Verilog, Cadence Encounter, Quartus (Altera), Synopsys RTL Compiler, Laker, Micro Wind, Xilinx Vivado, ModelSim. Programming Languages : VHDL, ... - Nov 11

Service Project

Schaumburg, IL
... Tools TOAD, Putty, SQL Developer, & MY SQL Languages/Hardware tools SQL, Oracle, PL/SQL, Shell Scripting, Java, C/C++, Verilog, VHDL, Assembly, Android Studio,Circuit design, Schematic & PCB design, Digital Logic design, Orcad, Altium designer, ... - Nov 11

Software State University

San Jose, CA
... Image Processing - Microprocessor & Microcontroller Competencies Programming Languages: C, C++, Python, CUDA C, C#, SQL, Verilog, Java Micro-controllers: FRDM KL25Z, LPC1758, Arduino UNO, Raspberry Pi 3, 8051, 8085/86, S3C6410, Jetson (TX2/TX1/TK1) ... - Nov 11
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