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Cupertino, CA
... CAD Tools: HSPICE, Spectre, Cadence Opus, Analog Artist, Diva (DRC and LVS), Star-Sim, Hercules (DRC and LVS), Dracula, Verilog Measurement Tools: Oscilloscopes, Digital multimeters, Semiconductor parameter analyzers, Wafer probers, Signal ...
- Mar 23
Menlo Park, CA
... in applications and accelerating execution times using custom hardware Proficiency in hardware programming languages (Verilog, VHDL) for design development and simulation Board bring-up and hardware debugging Bare-metal firmware development for ...
- Mar 22
Fremont, CA
... Ayar Labs July 2022-Sept 2023 Senior Staff Engineer Validation and testing of opto-electronic chips, porting of an FPGA design from one architecture to another (and learning what and FPGA is, plus Verilog). Managing data for receiver end of the chip ...
- Mar 16
Sunnyvale, CA
... netlist flow by integrating a new Verilog parser and writer o Used the APIs from the parser to remove the repeaters modules for RTL designers to reuse designs o The netlist with repeater modules removal provided convenience for designers to do LEC. ...
- Mar 10
San Jose, CA
... ● Programming languages: C++, Java, Javascript, HTML/CSS, SQL, hardware description languages- Verilog, VHDL, FPGA. Volunteer and Additional Experiences ● Certified Scrum Master (CSM) ● Machine learning and business strategy certification 2024 ● ...
- Feb 28
Dublin, CA
... Dame, IN Skills Unix/Solaris, Linux, Windows, CSH, BASH, Perl, Cadence Allegro, Verilog, Synopsys, 15+ years server hardware systems trouble shooting, hands-on use of test equipment including oscilloscopes, logic & protocol analyzers, multimeters.
- Feb 28
Santa Clara, CA, 95050
... Behavioral modeling of Power management analog blocks primarily in Verilog-AMS, SystemVerilog-RNM and VHDL-RNM. Top-level simulations, Analog-Digital Co-simulations (AMS) to verify analog modules from top-level. Experience in SystemVerilog-UVM Test ...
- Feb 21
Santa Clara, CA, 95050
... Excellent Verilog/SystemVerilog, VHDL RTL coding skill Extensive working knowledge of digital logic, analog circuit and mixed-signal design Proficiency in C, Matlab/Simulink and Python programming Working knowledge of Vitis HLS Experience with AXI4 ...
- Feb 06
Los Gatos, CA
... 2002 – 2008 Verification Architect Nvidia Santa Clara CA Led 17 software engineers developing C model and Verilog RTL verification infrastructure of 50+ million gate graphics integrated circuits. Supported teams at multiple sites in U.S. and India. ...
- Jan 19
San Jose, CA
... C, MATLAB, python, SIMULINK, Verilog, Xilinx, Python, Perl WORK EXPERIENCE Aug’18 – Mar ‘23 Technical Program Manager (50% time) at Intel Research Lab, Wireless Multi-Communication Research Lab (WMCR), Santa Clara, CA, USA. MuMIMO with GNN: Working ...
- Jan 16