| Resume alert | Resumes 1 - 10 of 5218 |
Software Engineer Embedded
San Jose, CA
... Collaborated with FPGA engineer to implement the hard assist feature required for gPTP. Worked with tier-1 Japanese customer to implement their requirement. • Various embedded Linux development experience including OpenWRT, Jetson Linux for NVIDIA ... - Apr 23
... Collaborated with FPGA engineer to implement the hard assist feature required for gPTP. Worked with tier-1 Japanese customer to implement their requirement. • Various embedded Linux development experience including OpenWRT, Jetson Linux for NVIDIA ... - Apr 23
Design Engineer
Reno, NV
... , HV I/O buffers, signal integrity analysis, SerDes, ADC, video DAC, PLL, analog micropower IC, microprocessors, FPGA prototypes and embedded MCU applications, IC packages (CSP and MCM), fine-line PCB, signal integrity, EMI-RFI and ESD protection. ... - Apr 23
... , HV I/O buffers, signal integrity analysis, SerDes, ADC, video DAC, PLL, analog micropower IC, microprocessors, FPGA prototypes and embedded MCU applications, IC packages (CSP and MCM), fine-line PCB, signal integrity, EMI-RFI and ESD protection. ... - Apr 23
ASIC Design Engineer Intern
Quan 1, 710000, Vietnam
... • Microprocessor, Microcontroller, FPGA. • VLSI, Verilog, Digital System. • IoTs, AI-Machine learning. FAVORITE • Reading book, Running. • Sport: Football, Badminton, Volleyball. • RTL design – Code Verilog. RESEARCH GOALS Take advantages of my own ... - Apr 22
... • Microprocessor, Microcontroller, FPGA. • VLSI, Verilog, Digital System. • IoTs, AI-Machine learning. FAVORITE • Reading book, Running. • Sport: Football, Badminton, Volleyball. • RTL design – Code Verilog. RESEARCH GOALS Take advantages of my own ... - Apr 22
Electrical Engineer Product Development
Taunton, MA
... FPGA selection, various IP and custom IPs generation and work with board level engineers on pinouts mapping. Sustaining effort porting legacy designs to modern FPGA platform. Principal Electrical Engineer Raytheon Technologies Jan 2020 – Apr 2021 ... - Apr 21
... FPGA selection, various IP and custom IPs generation and work with board level engineers on pinouts mapping. Sustaining effort porting legacy designs to modern FPGA platform. Principal Electrical Engineer Raytheon Technologies Jan 2020 – Apr 2021 ... - Apr 21
Software Engineer C++
Philadelphia, PA
... Software Projects include purchase of Altera FPGA development software. Project features include providing C++ code to implement a phase lock loop on a Freescale MC9S08QE128RM 8 bit micro-controller. This feature required reviewing the old Analog ... - Apr 19
... Software Projects include purchase of Altera FPGA development software. Project features include providing C++ code to implement a phase lock loop on a Freescale MC9S08QE128RM 8 bit micro-controller. This feature required reviewing the old Analog ... - Apr 19
SYSTEMS ENGINEER (NON-IT)
Belgrade, Serbia
... Sep 2004 Extension Services, University of California Irvine, Irvine CA USA “DSP Fundamentals Modeling and Analysis”, “C Programming for Embedded Systems”, “Digital Signal Processing with FPGA's”, “Fundamentals of Embedded Systems Design & ... - Apr 19
... Sep 2004 Extension Services, University of California Irvine, Irvine CA USA “DSP Fundamentals Modeling and Analysis”, “C Programming for Embedded Systems”, “Digital Signal Processing with FPGA's”, “Fundamentals of Embedded Systems Design & ... - Apr 19
Circuit Design Shipping Supervisor
Houston, TX
... I can use multimeter and oscilloscope proficiently .I can use FPGA component of Xilinx(ISE) and Altera(Quartus 2) proficiently, I can code with Python. SKILLS 1.digital and analog electronic circuit design. 2.plotting circuit. 3.proficiently use ... - Apr 18
... I can use multimeter and oscilloscope proficiently .I can use FPGA component of Xilinx(ISE) and Altera(Quartus 2) proficiently, I can code with Python. SKILLS 1.digital and analog electronic circuit design. 2.plotting circuit. 3.proficiently use ... - Apr 18
Firmware Engineer Embedded
Sacramento, CA
... ●SoC, FPGA, COB Piepeople at Micron 2022 - 2023 Sr. Firmware Engineer Working with the CXL Firmware group interfacing ASIC-CMC(CXL Memory Controller) ARC and ARM Cortex M3. JTAG, SoC and FPGA. Linux and Windows environments. Coding, Debugging. Alif ... - Apr 18
... ●SoC, FPGA, COB Piepeople at Micron 2022 - 2023 Sr. Firmware Engineer Working with the CXL Firmware group interfacing ASIC-CMC(CXL Memory Controller) ARC and ARM Cortex M3. JTAG, SoC and FPGA. Linux and Windows environments. Coding, Debugging. Alif ... - Apr 18
Vendor Management Qa Lead
San Antonio, TX
... The SW involved large FPGA and RT and PC code development, image processing, aircraft control and monitoring, multi-mode flight algorithms, interface protocols, etc. Implemented SPI, RS232 interfaces to airborne instruments, flight control surfaces, ... - Apr 16
... The SW involved large FPGA and RT and PC code development, image processing, aircraft control and monitoring, multi-mode flight algorithms, interface protocols, etc. Implemented SPI, RS232 interfaces to airborne instruments, flight control surfaces, ... - Apr 16
College Grad - Electrical and Computer Engineering
Downtown, TX, 77002
... National Institute of Electronics and Information Technology (NIELIT), India Relevant Coursework: Embedded C & ARM Cortex Microcontrollers, Linux OS and Internals, FPGA based Embedded system design, Embedded RTOS, Cyber Physical Systems and IOT. ... - Apr 15
... National Institute of Electronics and Information Technology (NIELIT), India Relevant Coursework: Embedded C & ARM Cortex Microcontrollers, Linux OS and Internals, FPGA based Embedded system design, Embedded RTOS, Cyber Physical Systems and IOT. ... - Apr 15