Verilog resumes in Portland, OR

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Engineer Software

Portland, OR
... Basic knowledge of VHDL and VERILOG design and implementation. Experience on real time OS (VxWorks/pSOS, Linux, Windows) and socket implementation. Experience with Quality Assurance tracking tools like HP QC, JIRA etc. Knowledge of Rational's Clear ... - Dec 04

Electrical Engineer Computer Engineering

Portland, OR
... in E CE, VTU, Bangalore, India (Graduated: June ’14) GPA:3.5/4.0 SKILLS Programming Languages: System Verilog, Verilog, C, C++, Python, Shell scripting Tools: Q uartus v13.1, Questa Sim, Mentor Graphics Veloce emulator, DC compiler, NuSmv (Model ... - Jul 23

Engineering System

Portland, OR
... Engineering GPA: 3.33/4.0 University of Mumbai, India (June 2011-July 2015) GRADUATE COURSES Digital IC Design Microprocessor System Design Computer Architecture System Verilog Embedded Systems Programming SOC Design with FPGA’s HW/SW Formal Verif. ... - Jun 21

Engineer Design

Beaverton, OR
... C/C++, Assembly, VHDL, Verilog, Perl/Tk/Tcl, PIC Basic, Max FORTH, FreeRTOS • IDEs: Keil MDK, IAR EW, Codewarrior, Code Composer Studio, Eclipse/GCC, Kinetis KDS, MISRA • Microsoft Office: Word, Excel, Outlook, PowerPoint, Project, Visio, InfoPath; ... - May 29

Engineering Engineer

Portland, OR
... AND STATISTICS, SCIKIT-LEARN, PANDAS, TENSORFLOW, KERAS, NETWORKX, OPENCV, ORANGE CAD: SOLIDWORKS AND GOOGLE SKETCHUP VERILOG HDL: XILINX VIVADO DESIGN SUITE, MENTOR GRAPHICS MODELSIM C, C++ MATLAB: SIMULINK ROBOT OPERATING SYSTEM: SLAM MAPPING ... - May 20

Engineer Design

Portland, OR
... on ASIC/FPGA Chip and High Speed Digital & Analog Board Level Design SKILLS Design & Testing Tools: • HSPICE & PSPICE, VeriLog HDL, OVN/UVM System Verilog and VHDL • IBM PC XT/AT, Pentium, Pentium Pro Motherboard and I/O, PowerPC Architecture ... - May 09

Design Engineering

Portland, OR
... Neural Networks Digital IC Design Application Specific Integrated Circuits (ASIC) Microprocessor System Design Pre Silicon Functional Verification Technical Skills • RTL Design and Verification experience using Verilog, System Verilog and VHDL. ... - Feb 12

CPU Performance/Design Verification Professional Experience

Portland, OR
... (Sep’15-Jun’17) University of Pune, (Aug’11-Jun’15) TECHINCAL SKILLS Programming : SystemVerilog, SystemVerilog Assetions, Verilog, C,C++, Python, Assembly, MATLAB, Perl Tools : Synopsys DC, Design Vision, Questasim, Cadence Virtuoso, Vivado Other ... - 2017 Nov 27

Verilog, SystemVerilog, C/C++, FPGA

Portland, OR
... Institute of Technology, University of Mumbai, India (GPA: 3.65/4.0) KEY SKILLS ● Programming: Verilog, SystemVerilog, C/C++ ● Scripting: Tcl, Perl ● EDA Suite and Tools: Xilinx Vivado, Synopsys DC & ICC WORK EXPERIENCE Project Volunteer Intern, HDL ... - 2017 Sep 23

Electrical Engineer

Portland, OR
... SKILLS Language: C, C++, Java, Assembly, SQLite, Verilog, Python, Perl, Shell Scripting, OpenWRT, and Git. EDA tools: Code Composer Studio, Android Studio, Eclipse, Virtuoso, Vivado, Eclipse, Code Blocks. Expertise: RTL code, Debugging (JTAG & GDB), ... - 2017 Aug 18
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