Cadence resumes in Sunnyvale, CA

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Engineer Design

San Jose, CA
... circuits, Advance Microwave Engineering, Mobile Communication systems, Digital Logic Design, Microprocessors and Microcontrollers SKILLS § Tools: Calibre PV tools, Cadence Virtuoso, Xilinx ISE, Vivado, LTSpice, Advance Design System (ADS), ModelSim. ... - Aug 27

Engineer Test

Sunnyvale, CA
... • Experience in using Cadence, Synopsys various VIPs and deployment • Experience in IP/block/SOC level verification. • Expertise in development of UVM/OVM compliant coverage driven randomized Test bench environment using System Verilog & SVA • ... - Jul 10

Manager Project

Pleasanton, CA
... Tracked issues, risks, metrics, took corrective & preventive actions, drove results on a regular cadence. Resolved issues post deployment, partnering with ServiceDesk / HelpDesk, Virtual Support, Technical groups. SYMANTEC CORPORATION, Mt. VIEW, CA ... - Jun 20

Manager Engineer

Fremont, CA
... Can use PCAD-2001, Solid-Works and Cadence CAD tools. MS Outlook, Word, Excel, VISIO, OMNIGraffle Apple Inc. 10/2009 – 04/2019 RF Lab Manager/Technician Built, expanded, maintained and supported RF compliance and certification test labs for all ... - May 21

Power Electronics Engineer

Foster City, CA
... India, GPA – 8.7 / 10.0 Jul ‘07 - May ‘11 TECHNICAL SKILLS Programming - C, Matlab/Simulink Software – Simplis, LTSpice, Cadence Virtuoso, Altium, MathCAD, Orcad, Git ACHIEVEMENTS Recipient of $4k Gates fellowship Jan ’18 – May ‘18 Recipient of ... - May 16

Engineer Electrical

San Jose, CA
... TECHNICAL SKILLS Languages and/or HDL - Verilog, System Verilog, Perl, C++ EDA Tools - Synopsys VCS, Cadence Incisive, NCSim, Virtuoso, Spectre, Hspice, Xilinx ISE, ModelSim Operating Systems - Linux, Windows, macOS Familiarities – ASIC/FPGA design ... - May 14

Engineer Design

Sunnyvale, CA
... Analyzer, Signal source Analyzer, Digital Multi- meter, Arbitrary Waveform Generator, Spectrum Analyzer, Network Analyzer, Aardvark I2C tool, Power supply Design tool & Programming: Cadence Virtuoso, Cadence Allegro, Altium, Python, Pandas, LabView - Apr 12

Designer Mechanical

Milpitas, CA
... (Altium17.1.9 and Cadence Allegro 17.2 and Solidworks) Flex designs and manufactures for all kinds of customers who provide data in different CAD packages. I am proficient in both Allegro, Altium and Solidworks. Square Inc. January 2014 – March 2017 ... - Apr 09

Electrical Engineering Design

San Jose, CA
... Tools Verilog Cadence- Virtuoso DSP Builder System Verilog Synopsys- Design Vision Matlab C Quartus II Comsol R Low Power Solution ModelSim Python Synopsys- Design Complier RESEARCH PROJECTS The George Washington University, Washington, DC Oct. ... - Apr 05

Engineer Design

San Jose, CA
... Performed simulations using HSPICE and Spectre, schematic capture, layout with Cadence Virtuoso, and layout verification (contract position). 1/00-4/03: National Semiconductor, Santa Clara, CA Design Engineer, worked on design of ESD circuits and ... - Mar 09
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