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Design Project

Location:
Gulbarga, KA, 585310, India
Salary:
as per the company ruls
Posted:
September 06, 2012

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Resume:

MALLIKARJUN.G

c\o chandrakumar,#**,*rd crs lb sastry ngr,

indiranagar 2nd stg,lakshmipuram bus stop,bangalore

Email id: ***********.***********@*****.***

Mobile Number: 897*******

Career Objective:

To work in learning and challenging environment, utilizing my skill and knowledge to be the best of my abilities and contribute positively to the growth of the organization as well as my personal growth .

Education :

Degree Discipline Institute/

University Year of Passing Aggregate

B.E Electronics & Communication Vemana Institute of Technology

2012 60.14%

Diploma in Electronics & comm. Engg. Department of

Technical Education,

Bangalore H.K.E.Society’s Polytechnic Gulbarga-585***-**** 65.67%

Class 10th

Karnataka Secondary Education Examination Board, Bangalore. Sri ShivanandaShivayogikan med high school,sonna 585-***-**** 69.76%

Academic Projects:

Title: Design of an Two Stage Op-Amp using CMOS 180nm Technology

Role: To design the Op-Amp for the given specification

Organization: Vemana Institute of Technology

Duration of Project: 4 months

Description: The main objective of our project is to design anTwo Stage Op-Ampusing CMOS 180nm technology.The goal of the project is to design and implement a two stage fully differential, RC Miller compensated CMOS operational amplifier, to meet certain given specifications. High gain enables this circuit to operate efficiently in a closed loop feedback system, whereas high bandwidth makes it suitable for high speed applications. Based on a clear understanding of the specifications, the circuit topology of the standard CMOS operational amplifier was chosen because it was believed that such a design could meet the specs and that the design of such an amplifier is fairly simple.The design is also able to address any fluctuation in supply or dc input voltages and stabilizes the operation by nullifying the effects due to perturbations. Comparison is drawn between given specifications and result from computer simulations using Cadence in the schematic level. . Implementation has been done in 0.18 um technology using libraries from Cadence with the help of tools from Analog Spectre and Cadence.

Tools Used : Cadence EDA

Challenges Faced: 1.To design the Op-Amp using hand calculation for the given specification.

Core Proficiency:

Basics of C,c++, System Verilog, vhdl Cadence EDA

Personal Profile:

Name : MALLIKARJUN.G

Date of Birth : 10/08/1990

Address : c\o chandrakumar,#17,3rd crs lb sastry ngr,

indiranagar 2nd stg,lakshmipuram bus stop,bangalore

Father’s Name : Gollalappa

Nationality : Indian

Sex : Male

Languages known : English,Kannada, Hindi



Contact this candidate