MICHAEL F. PAINE
PAWTUCKET R.I. ***61
CELL 585-4872
EXPERIENCE:
SENIOR PRINTED CIRCUIT BOARD DESIGNER USING CADENCE ALLEGRO
TO DESIGN HIGH DENSITY MULTI LAYERED, PCB’S USING PHYSICAL AND
ELECTRICAL CONSTRAINTS TO CONTROL PLACEMENT AND ROUTING
LENGTHS OF HIGH SPEED SIGNALS
EXTENSIVE EXPERIENCE USING BGA, FPBGA, POWER SUPPLY, DDR3, RF
COMPONENTS
CADENCE SPECCTRA AUTOROUTER KNOWLEDGE TO COMPLETE ROUTING
SYSTEM PROFICIENCY:
CADENCE ALLEGRO REV 16.3, 16.1, 16.0, 15.5, 15.2
VSURE, VALOR DFM VERIFICATION
CADENCE CONCEPT
VALID CONSTRUCT
MENTOR CHIPSTATION
WORK EXPERIENCE:
LTX- CREDENCE CORPORATION
CONTRACT ASSIGNMENT USING CADENCE ALLEGRO TO DESIGN PCB
EMC CORPORATION 1998 – 2011
CADENCE ALLEGRO: SENIOR PRINTED CIRCUIT BOARD DESIGNER
CADENCE ALLEGRO: PHYSICAL LIBRARY SYMBOL DEVELOPMENT
COORDINATED MEETINGS WITH ESSENTIAL DEPARTMENTS TO ENSURE
SCHEDULED COMPLETION OF PROJECTS
EMC AWARD RECOGITION:
RECEIVED SEVERAL AWARDS APPROVED BY EMC’S VICE PRESIDENT,
FOR PERSONAL EXPERTISE, COMMITMENT, DEDICATION AND SACRIFICE
TO ENABLE EMC CORPORATION TO ACHIEVE ITS SCHEDULED GOALS
LOCKHEED MARTIN 1989 – 1998
CADENCE ALLEGRO: SENIOR PRINTED CIRCUIT BOARD DESIGNER
CADENCE ALLEGRO: PHYSICAL LIBRARY SYMBOL DEVELOPMENT
CADENCE CONCEPT: SCHEMATIC LIBRARY LIBRARIAN
CADENCE CONCEPT: SCHEMATIC LAYOUT
DATEL 1983 – 1989
CALMA: HYBRID CIRCUIT DESIGNER
EDUCATION:
1981 – 1983 RHODE ISLAND SCHOOL OF ELECTRONICS _ ASSOCIATE ENG DEGREE
1975 – 1977 UNIVERSITY OF RHODE ISLAND _ PHYSICAL EDUCATION MAJOR