Circuit Simulation Expert
Resume:
Dr. Kim Gordon Helliwell
San Jose, CA *****
*****@*******.***
Profile
Use my extensive experience and programming expertise to generate innovative
solutions for simulation, constraint and modeling problems thus saving time and
money while enhancing my company's image. A key player in using expert
training, troubleshooting, and coordination skills to efficiently generate
design automation software for high speed design. Seeking to apply this
expertise to other software development problems.
Selected Skills
C/C++ Perl UNIX
HSPICE SPICE Spectre
Csim(XA) SpecctraQuest/SigExplorer TCL
Professional Experience
Staff R&D Engineer
2008-2012
Synopsys
Technical leadership in developing and perfecting a new transient simulation
engine for Csim (formerly XA), a fast spice high capacity circuit simulator.
• Improved and fixed the main Newton-Raphson iterative process by
cleaning up and simplifying some existing NR controller code in XA
• Improved the operation of “Spice Optimized for Arrays” (a patented
technology of Synopsys) by fixing internal NR calculations of cells.
• Improved internal debugging efforts by implementing a number of
debugging instrumentation features in XA such as diagnostic printouts and
waveform dumps.
• Improved overall simulation performance and accuracy by analyzing
numerous failing QA cases for the new TR engine.
• Led a team of engineers to analyze and fix remaining accuracy error in
QA cases prior to an impending product release.
Principal Engineer
2005-2008
LSI Logic, Inc
Technical leadership in creating package parasitic models for SI simulations,
and in correlating models to measurements.
• Automated the process of generating SPICE test decks for package
models, thus reducing the time required from 1 hour a few seconds.
• Developed the package modeling group’s capability to generate frequency
domain package parasitic models for SERDES IP.
• Created a PERL script to plot and process S-parameter models in
TouchStone format, which vastly improved the efficiency of evaluating models
over native tools available in HFSS or O-Wave.
Senior Signal Integrity Engineer
2004-2005
Silicon Bandwidth, Inc.
Lead the effort to develop and deploy connector models for multi-gigahertz
designs.
• Decreased time required for model testing 10X by deploying Cadence’s
MGH design tool thus moving the model testing effort in-house.
• Improved accuracy of jitter simulation measurements 5-10X over those
reported by the Cadence Channel Analysis tool by developing a script to
calculate jitter from the raw waveforms.
CAD Architect
2001-2003
Apple Computer, Inc., Cupertino, California
Design and evaluation of signal integrity simulation software solutions for
Apple’s line of Macintosh computers.
• Enabled the G5 (“world’s fastest personal computer”) to ship on time by
delivering, coordinating, and managing the signal integrity and constraint
infrastructure.
• Improved efficiency and accuracy of design process by centralizing the
IBIS model library and automating process of validating and deploying signal
integrity models.
Senior CAE Engineer
1998-2001
Acuson Corporation, Mountain View, California
Support and evaluation of analog and signal integrity simulation software.
Support Analog Workbench, HSPICE, Spectre, and Specctraquest/SigNoise.
• Modernized high speed design environment by evaluating, recommending
and getting designer and management buy-in for purchase of new SI simulation
tools.
• Saved eight or more hours of intensive manual labor per board by
assessing designer needs for better test point coverage, and by creating a Perl
script to optimize placement of test points.
Software Architect (Technical Lead)
1997-1998
Power Design Tools, Inc., Los Altos, California (contract with Cadence)
Simulation and library model development and maintenance.
• Enabled Cadence to retain continued revenue flow from AWB by
implementing AWB/Spectre Noise analysis.
• Enabled Cadence to retain maintenance revenues of $3 million from AWB
customers by implementing hierarchical terminal currents.
Manager, Core Simulation Group
1992-1997
Cadence Design Systems, Inc., San Jose, California
• Managed the Core Simulation Group, a small team of developers working
on Spectre, Cadence's premier analog and mixed signal circuit simulator.
• Developed a strategy for integrating Spectre as a simulator in the AWB
environment in a way that balanced the needs of several stakeholders. This
increased customer choice and sales and maintenance revenue of both Spectre and
AWB by approximately10%.
Career Highlights
• Developed SPICE Plus, a circuit simulator based on Berkeley SPICE 3 and
designed to work with the Analog Workbench. This enabled Analog Design Tools,
Inc. to maintain its lead in analog design software.
• Created and implemented the initial design of the interface between
SPICE 2G6 and the Analog Workbench (AWB) front and back ends. This simulation
link was key to the existence and later success of AWB as an award-winning
product of Analog Design Tools, Inc.
• Researched and developed a magnetic model that incorporated hysteresis
and saturation into a new SPICE element model. This model was key to acceptance
of AWB by power supply design engineers.
• Enabled Cadence to retain continued revenue flow from AWB by
implementing AWB/Spectre Noise analysis.
• Enabled Cadence to retain maintenance revenues of $3 million from AWB
customers by implementing hierarchical terminal currents.
• (At Apple) Created a signal integrity simulator that enabled whole
board SI simulations. This potentially could have saved Apple $25 million
compared to use of commercial solutions.
Other Accomplishments
• Served on the IBIS Model Quality committee 2002-2008.
• Presented talk at International Cadence User’s Group conference, 2001:
“Creating Test Probe Fixtures for Board Debugging.”
• Presented talk at International Cadence User’s Group conference, 2000:
“Comparison of Signal Integrity Simulations and Lab Measurements: a ‘Forensic’
Case Study.”
• Presented talk at IBIS Summit 2005: “Status Report of the IBIS Quality
Committee.”
• Currently serving on the Alumni-Industrial Advisory Board for the
Engineering College at Northwest Nazarene University, Nampa, Idaho.
Education
Ph.D., Solid State Physics, Arizona State University, Tempe, AZ
M.S., Physics, Arizona State University
B.A., Physics, Northwest Nazarene College, Nampa, ID.
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