QA Analyst/ Engineer

CURRICULAM-VITAE

Suhas S. Kulkarni

E-mail:***********@*****.***

Mobile: +91-982*******

Summery: -

Serving Electronics Design & Automation Center (EDA) from last 8+Years.Extensive experience in PCB Design on Mentor Graphics Board Station, Cadence Allegro PCB Tool.

Carrier Objectives: -

To continuously improve myself by upgrading knowledge and skill everyday for achieving perfection in whatever tasks I perform. Seeking challenging career in Electronics Design, Automation (EDA).

Educational Qualification: -

BE (Ind.Elect) from Dr. B. A. M.University,Aurangabad in June 2000 with First Division.

Work Experience: -

1. Tata Consultancy Services Dec 2007 to Nov25th 2010

Designation ITA(PCB Design,PCB Layout Enginner)

2. Name of the Employer Wipro Technologies

Designation PCB Design Engineer

3. Name of the Employer : Terna EDA Centre.

Designation : PCB Design Engineer

4. Name of the Employer : Nexa Embedded Systems & Solutions.

Designation : Design Engineer

Responsibilities:

• Design the PCB from Schematic level to Gerber Generation on

Mentor Graphics Board Station Tool, Cadense Allegro Tool.

Involved in EMI EMC testing for automotive product.

a) Design Architect: Schematic entry, customize symbol creation, adding properties

to symbols & instances.

b) Library: Managing Library, Creation of Customize Geometries, standard

Geometries (footprints) for Different parts. As per the IPC SM 782.

c) Mapping: Creation of part number, Mapping of customize created geometries.

d) Packaging: Assigning part number & geometries to components, Creation of Net

List & Component list.

e) Placement: Placing of components by manually, strategic placement & by Auto Placement. Constraint Setting.

f) Routing: Routing board by manually, strategic routing.

g) Multi layer Define layer Stack-up, Creation of multi signal, power layer. Merging Number of power planes into single plane (Splitting power planes).

h) Fablink Creation of Gerber file, Aperture file, CNC drill file, & Assembly

Drawing data, tensil, Penalization if required.

• Customer interaction to understand the project requirements.

• Design analysis & project plan preparation.

• Interaction with PCB manufacturers.

• Project management on Day- Day basis.

• Special guidelines will be follow for Analog,Mixed signal & High frequency jobs.

• Maintaining the job history of each job.

• Guiding to Proto-type PCB assembly.

So far I have designed, Single side PCB, Double sided PCB, Multilayer PCB(Max10Layer)

PROJECT Handled for Different Client :

Vehicle Interface: Automotive related project: Designed 8 Layer PCB Automotive Diagniotic Board.From Basic idea of PCB size estimation to till production.

PCB Design from schematic Entry,Footprint creation,Layout to Final Production.

Involved for EMI, EMC Testing in ARAI India.

Alcatel-Lucent: Telcom Board

1 Successfully Design 12 Layer Board with team for Telecommunication application.

It’s ATM to ETH card.

Its analog & Digital Mixing Board.MPC8360 processor with DDR2 are used.

2 Audio Interface Card: Its 6 layer Board Design for Medical Application.

Analog & Digital Mixing Board.Special Guideline followed for analog and digital mixing board.

Sindhara Super Media

1. Design Multilayer PCB for Image compression, Camera Application,

WI LAN, Qwikchip.

2. Designing Multi Layer Boards (DIGITAL, ANALOG, MIXED).

3. Designing boards for FPGA and fine pitch IC’S.

4. Generating Bill of Materials for the PCB’S.

5. Verifying Stencils

Tata Institute of Fundamental Research.

A) Design the PCB for Research & Development application. High speed boards with 100MHz Frequency. So special care will be taken for Signal Integrity effects i.e. crosstalk, ground bounce, EMI EMC issues, Differential pair routing, for PCI clock snake type routing to matching the length. Multilayer PCB Ten layer,

1) Design the Multilayer PCB total layer count 10

2) FPGA VertexII Pro with BGA 456 Pin Package.

3) Fine Pitch Spartan XC2S200 of 208pins.

4) 100 Pin Euro Connector

B) Design the Multilayer PCB total layer count 8

1) FPGA Spartan XC2S50 with Fine Pitch PQFP 208 Pin Package.

2) Fine Pitch PLX9052 of 160 pins.

3) PCI Bus with ADC.

C) Design the Multilayer PCB total layer count 4 using Split Plane Concept

Tokheim & Kaizen

1) Design the Multilayer PCB total layer count 6 using Arm9 processor.

2) Layer Stack up using Split Plane Concept.

3) Arm9 Processor BGA Package with 0.6mm Pitch

4) Via size 0.25mm with trace width 0.125mm & clearance 0.1mm.

Larsen & Toubro Ltd.

1) Design the Multilayer PCB total layer count 4.

2) Total 4 Supply & Four ground are Divided using split Plane

3) 96 Pin Euro Connector with 2.54mm Pitch

4) Fine Pitch PLCC52, TQFP64, PLCC44 with BNC JTAG Connector.

CONTECH INSTRUMENTATION Mumbai.

1) Design the PCB for accurate Weighing Machine.

2) Designing Double Sided Boards (DIGITAL, ANALOG, MIXED).

3) Board Size 140x105mm

4) Total Traces 503 Total components 140

BHABHA AUTOMIC RESEARCH CENTER Mumbai

Design the PCB for there research & Development application. Using FPGA. Design the Double sided, Multilayer Boards.

CROMPTON GREEVES LTD.

Design the Square, Round PCB for the application of Railway Fans.

Complex PCB with there size constraints.

ESCON ELEVETORS:

Design double-sided board using microcontroller 89C51, power supply LM7805 etc

Board contains total 400 components & 1200 traces.

EROS ELEVETORS:

Design the double-sided board from schematic entry to Gerber generation.

Total components are 450 & traces are 1400.

Automatic Vehicle Locating System for Iflect Technologies

1) Using GPS receiver updates the position of the vehicle.

On a central server using GSM/GPRS Network,

2) Hirose 80 pin connector SMD, Frc 40 pin through hole, TO263 spack-5 Lead,

Achievements:

1) Successfully Designed 12 Layer Board for Alcatel-Lucent

2) Successfully Designed Boards using BGA (Ball Grid Array), and

Other fine pitches IC’s. Max pin Count (456).

3) Successfully Teamed up Designed Boards for PCI slot.

4) Designed Board for High Speed Applications.

5) Designed Boards Considering EMI, EMC, Crosstalk, Signal Integrity,

Differential Pair Routing.

6) Impedance matching as per requirement.

7) Successfully designed ten layer Board Using VERTEXII PRO.

8) Involved for the EMI EMC Testing for Automotive product in TCS.

4. Name of the Employer : Devogiri Latex Pvt.Ltd.

Designation : Maintance Engineer

Period of Service : June2001 – June2002

Responsibilities:

Job responsibilities include PLC, Drives Electronics Testing Machine Maintance.

Looking overall Electronics Temperature Controller.

Hands on experience in EDA Tools.

a) Mentor Graphics Board Station V 8.7_1.1 & Destination.

Gerbtool (GC Preview)

b) Cadence Orcad CIS, Layout plus Ver 16

c) Mentor Graphics Board Station RE

d) Zuken Visuala 8 PR Editor Lighting PCB.

Training:

Sun Solaris Operating System IIHT pune

From July2000 – Feb2001

Operating Systems

Operating System: DOS, Windows-98, Windows-NT, and Sun solaries

Personal Details

Name : Suhas S.Kulkarni

Date of Birth : 27th April 1976

Marital Status : Married

Present Address : New SKF Colony Chinchwad Pune 33.

The above statements are true & best of my knowledge.

Place: Pune Name: KULKARNI SUHAS SAKAHAHRI

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