Glenn Crampton
Austin, TX 78737 *********@******.**.***
High Technology Manufacturing Professional
Objective: Seeking a permanent or contract position in the Semiconductor industry as a Process, Device, or Yield Enhancement Engineer
Technologies: CMOS, Multi-Level metallization, SRAM devices (1.0 – 5.0 u)
Technical Skills:
• RS1 And JMP (Statistical Analysis tools)
• Project Management (PMI)
• Statistical Process Controls (SPC)
• Yield Enhancement (Parametric and particulate controls)
• Design of Experiments (Taguchi and Classical)
• Statistical Analysis (ANOVA, parametric and non-parametric)
• Total Quality Management and Six Sigma
• Lean Manufacturing
• Gauge Repeatability & Reproducibility
• FMEA’s
• New Product Development
• Supplier Relationships
• UNIX and MS Office
Professional Experience:
Hospira
May 2010 to Current
Contract Manufacturing Supervision
• Provided supervisory leadership to 55 direct labor personnel in the manufacture of I-V bags for the medical industry.
• Responsible for the quality of product as it was produced.
• Provided weekly Key Process Indices (KPI) reports on the Irrigation department.
• Analyzed KPI data for process improvements.
• Worked on cross functional teams to resolve routine maintenance and quality issues with the manufacturing equipment.
• Analyzed production data to ensure current and future production starts.
• Worked on cross functional teams to meet product filling schedules.
• Worked on cross functional teams to implement Lean and 5S philosophies on the factory floor.
• All above activities and projects were reported to Management on daily basis.
Flextronics (formerly Solectron)
March 2007 to 2009
Troubleshoot and Repair Supervision
• Provided technical and supervisory leadership to 37 circuit board repair technicians and operators.
• Monitored circuit board repair effectiveness and implemented recommendations for improvements.
• Worked on cross functional teams to improve the In-Circuit Test (ICT) process.
• Worked on a cross functional team to install and qualify x-ray defect inspection systems.
• Analyzed repair data and shared with management and cross functional SMT process improvement teams.
• Work with QA to provide feedback to the Surface Mount Technology (SMT) department on board defects.
• Worked on cross functional teams to reduce in-process board repairs.
• Implemented process flow charting to facilitate Ball Grid Array (BGA) repair process.
• Worked on cross functional Kaizen teams to improve circuit board processes.
• Worked on cross functional Lean and 5s teams.
• Maintained ISO9000 philosophies on the test and repair floor.
• Implemented piece part inventory reduction programs.
• Set clear goals and objectives, and drive execution with detailed plans in order to meet the project milestones.
• All above activities and projects were reported to Management on daily basis.
Motorola
July 1996 to 2002
Test Process Manager
• Provided technical leadership to 10 test process engineers and technicians to provide 24 hour by 7 days per week tester support.
• Responsible for the Teradyne tester configurations, specifications, and inventory to ensure product testability.
• Responsible for laser marking and package dimension integrity. Worked with internal Quality Control department on visual and dimensional specifications.
• Worked with the tester suppliers to maintain service and maintenance contracts.
• Worked with Product Engineering teams to ensure tester configurations for new product development.
• Assisted in new final test facility start-up.
• Responsible for oversight of all department projects using PMI techniques.
• Worked on cross functional teams for gauge R&R studies on the final testers.
• Worked on cross functional teams to implement FMEA’s for the final test process.
• Worked on cross functional teams to implement QS-9000 in the final test process.
• Worked with Product Engineering teams to improve test yields.
• Outsourced the Burn-In operation. Worked with Burn-In vendor operations to ensure product quality.
• All above activities and projects were reported to Test Management on daily & weekly basis.
Motorola
1989 to 1996
Member of the Technical Staff
• Designed and implemented complex manufacturing solutions to improve product quality and yields.
• Worked with Product and Device Engineering teams on product qualifications
• Implemented and monitored an in-line gate rupture test to ensure gate oxide quality in a more real-time approach.
• Correlated in-line gate rupture data to end-of-process parametric data to ensure a quality process in the factory.
• Run defect to bin failure correlations to identify defects which are yield limiter.
• Perform detailed defect characterization by performing (FA) analysis using SEM cross-sections to study the composition of the defect of interest in multi-metal process development.
• Worked on cross function teams to overlay in-line defect map to functional probe map. This is to predict yield loss of particular wafer or product and to understand particular killer defects per process module.
• Work with silicon and other piece part suppliers to specify in-coming quality parameters to meet factory specifications.
• Worked with cross functional teams to reduce in-line defect reduction activities by driving follow ups for any corrective action taken as well as process tool (SPC) trends and PM schedules.
• Worked with domestic and international suppliers and partners through cross functional quality audit teams.
• Benchmarked sister factories in Southeast Asia.
• Started Black Belt certification process.
• All above activities and projects were reported to Device & Process Engineering Management on daily and weekly basis.
Motorola
1982 to 1989
Process Engineer
• Responsible to ion implant, gate oxidation, and multi-level metal manufacturing processes.
• Responsible for optimizing all device process parameters by analyzing and adjusting all critical parametric parameters.
• Implemented an on-line SPC and PM program in the factory.
• Worked with production personnel to reduce factory cycle times.
• Worked with device engineers to give feedback on low yielding lots.
• Responsible to reduce holds for lots in-line as well as at parametric test probe.
• Worked with (FA) group to find the failure mechanism and root cause.
• Conduct yield enhancement project by performing, DOEs, split-lot analysis and wafer pattern failure analysis.
• Practice Total Quality Management (TQM), continuous improvement and (SPC).
• Interact with cross functional team on daily and weekly basis.
• All above activities were reported weekly to Process & Device Engineering Management.
Education:
BSEE – Texas A&M University
Accounting Certificate