Industrial Training Encoder

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Career Objective

• To devote my skills and knowledge for the fulfillment of the organization

Goal and seeking a career to share my knowledge.

Education

M. Tech :Specialization in VLSI and ES

University :Mahatma Gandhi University

CGPA :8.67

B. Tech :ELECTRONICS and COMMUNICATION

University :Mahatma Gandhi University

CGPA :8.46

Skills

Languages :Verilog, MAT, KIEL, XILINX,C,C++

Tools :LT SPICE, VLSI CAD,DSCH2

Operating System : Microsoft Windows 2000/XP/7/8, GNU LINUX CHITHRA SOMASUNDARAN

E-Mail: *******************@*****.***

D.O.B: 28- June-1993 Direct Contact: +840*********, what’s App: +918********* Present address: : Dragon Hill Residence, phuoc Kien, Nha Be, Ho Chi Minh, Vietnam Languages Known- English, Hindi and Malayalam.

2

Publications

“Design and implementation of Deadlock Avoidance for On Chip Buses with Elastic Buffer and Error Correction” in IJIRCCE, Volume 4, Issue 6, June 2016.

“Dead lock avoidance for on chip buses with elastic buffer and error correction” in International Journal of Science and Research, Issue 11, July 2016.

Strength

Sincere and hardworking.

Excellent in time-management.

Strong logical,mathematical and programming skills. Training Program/ Visit

Industrial training : Doordharsan and Keltron (2014)

Industrial visit : Akhashavani Thrissur (2014)

Industrial Workshops / Seminars

Participated in the industrial training program at KERALA STATE ELECTRONICS DEVELOPMENT CORPORATION LTD AROOR and at DOORDARSHAN HIGH POWER TRANSMITTER, KAKKANAD.

Participated in the two days national workshop at MAR ATHANASIUS COLLEGE OF ENGINEERING KOTHAMANGALAM in EMERGING TRENDS IN VLSI AND EMBEDDED SYSTEMS.

Participated in IPV6 THE NEXT GENERATION INTERNETPROTOCOL seminar conducted by SPECTRUM INFOTECH (2014).

Participated in one day workshop on ARM7 TDMIS conducted by FOCUZ INFOTECH (2013). Academic Project

M.Tech

Main Project : Dead lock avoidance for on chip buses with elastic buffer and error correction(2016) Role : Avoid the occurrence of deadlock condition in system-on chip buses. 3

Mini Project : Partially Parallel Encoder Architecture For Long Polar Codes. Role : Error correction technique to reduce hardware complexity in case of long polar codes. B.Tech

Main Project : Finger Print Operated RFID Unit (2014) Mini Project : Wireless range extender for IR remote controls. Personal Information

• Date of Birth: 28.06.1093

• Marital Status: Married

• Nationality: Indian

• Present address: : Dragon Hill Residence, phuoc Kien

, Nha Be, Ho Chi Minh, Vietnam

• Permanent address: Chempattuparambil house,

South Aduvassery, Chengamanad, kerala 683578

• Passport No: P9827826

• Languages Known: English, Hindi and Malayalam.

• Joining time: Will be available from Jan-2023

CHITHRA SOMASUNDARAN

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