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Design Engineer

Location:
Bengaluru, KA, India
Posted:
August 08, 2015

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Resume:

RAVIKANTH. P

D-no *-*** • Car Street • Tadipatri • Anantapur(dist) -515411

Phone : +91-874******* • E-ma i l : r a v i kan t h . ka t t i@gma i l . c om OBJECTIVE

Being a final year post graduation student in the VLSI stream, I am seeking for the position of a Design Engineer that requires applying my analytical skills in the field of VLSI.

EDUCATION

Currently pursuing M.Tech program specialized in VLSI &Embedded Systems in MSRIT, Bangalore &obtained 9.03 CGPA till now.

B.E in Electronics &Communications Engineering graduated in the year 2010 from CMRCET, Hyderabad (Affiliated to JNTU-H University) with 66.20%.

Intermediate (MPC) in Sri Chaitanya Junior College, Hyderabad in 2006 with 86.7%.

SSC in S.S.V.M School, Tadipatri in 2004 with 85.33%. SUBJECTS LEARNED

Analog, Mixed Signal and Low -Power Design, Digital Design with HDLs, Formal Foundations of VLSI Design, and Introduction to VLSI Design. TECHNICAL SKILLS

Programming languages: C.

HDLs : VHDL and Verilog

Operating Systems : Windows 7

PROJECTS

Implemented “64-bit KOGGE-STONE ADDER AND HYBRID ADDER” Using Cadence (M.Tech).

Project on “HOME AUTOMATION” (M.Tech).

Project on “PARKING ASSITANCE USING ULTRASONIC SENSORS”

(M.Tech).

Project on “LIVE HUMAN DETECTION USING PIR SENSOR” (B.Tech). ACHIEVMENTS

Won First Prize in Texas Analog Design contest –Avishkar-15, MSRIT, Bangalore, Karnataka.

Stood in Third Position in Digital Design Contest in Avishkar-15, MSRIT, Bangalore, Karnataka.

EDA TOOLS(DIGITAL DESIGN)

Simulator: Isim(Verilog/VHDL), NCsim Cadence

Synthesis tool : XST(Verilog/VHDL),RTL compiler

FPGA implementation tools : Spartan-3E

EDA TOOLS(ANALOG DESIGN)

Cadence EDA tools

schematic Capture: Cadence Virtuoso Schematic Editor Simulation: Spectre,Ams.

Physical Layout: Virtuoso layout Editor

Verification: Assura( Standard DRC, LVS)

STRENGTHS

Good Knowledge in the VLSI Design flow.

Strong analytical Ability Skills.

Good English Communication skills both written and verbal.

.

HOBBIES

Dancing, Playing Cricket, volleyball, Badminton, Caroms. PERSONAL DETAILS

Date of birth: 12-06-1989(DD-MM-YYYY).

Gender: Male.

Father’s Name: P.Sreenivasulu.

Mother’s Name: P. Adhi Lakshmi

Nationality: INDIAN.

Languages known: English, Telugu, Hindi.

Expected CTC: As per company norms.

Marital Status: Unmarried.

Hobbies: Playing Badminton, Playing Cricket, Listening music, Reading Books. DECLARATION

I hereby declare that the above mentioned details are true to the best of my knowledge. Date :

Place : (P. RAVIKANTH)



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