NIKHIL GUPTA
Mobile: +91-992*******/976-***-**** Address: 228/2, Nisarg Society, Aundh - Baner, Pune-411007
E-Mail: **************@*****.***
OBJECTIVE
To develop my career in a performance oriented company where I will be a valuable resource, contributing quality ideas on challenging assignments that shall yield the twin benefits of job satisfaction and a steady-paced professional growth
PROFESSIONAL SNAPSHOT
* A budding design engineer trained to design @ CDAC ACTS, Pune in the area of VLSI Design.
* A professional worked with Vodafone as Executive, handled Prepaid business for Rajasthan Circle from Feb’13 to Nov’13.
* Worked as Debug/Troubleshooting Engineer at Ericsson India Ltd from June’12 to Dec’12.
* Worked as Lecturer at Arya Institute of Engineering & Technology, Jaipur (Rajasthan) from July’11 to Nov’11.
* Successfully undergone projects on Yield Improvement Project at Ericsson India Pvt. Ltd, Jaipur,
* Ability to manage and complete projects to the highest standards meticulously and within specified deadlines of the work.
* A versatile, analytical and smart working person with practical hands-on approach.
Key Skills
Key Accountabilities:
* Handled Data Analysis for Vodafone Prepaid Business.
* Handled PCB Component level troubleshooting which includes fault
* Handled work on the TRX (Surface Mount Technology) & PA (Surface Mount Technology) board level products of Radio Units.
ACADEMIC CREDENTIALS
2014 PG-DVLSI in VLSI Design (70.16%) from Centre for Diploma of Advance Computing (ACTS) .
2011 B.Tech in Electronics & Communication (69.35%) from Maharishi Arvind Institute of Engineering & Technology, Rajasthan Technical University, Jaipur.
2006 12th (71.85%) from Shiv Jyoti Sr. Sec. School, Rajasthan Board of Secondary Education, Kota.
2004 10th (81.50%) from Modern Sr. Sec. School, Rajasthan Board of Secondary Education, Jhalawar.
ACHIEVEMENTS
* ERP Analysis @ Vodafone.
* Yield Improvement Project at Ericsson India Pvt. Ltd., Jaipur(June 2012 to August 2012)
PROJECTS UNDERGONE
Title: Implementation of parallel AES algorithm using FPGA (Jul’14 to Aug’14)
Description: This project presents a Field Programmable Gate Arrays (FPGA) based Hardware implementation of Advanced Encryption Standard (AES) with 128-bit key as a constant which is used for encrypting the text file and image for secure transmission. Timing report for the files are taken and conclude that text file of 128 bit size is taking less time to encrypt and decrypt compare to the image file. Synthesizing and implementation (Translate, Map and Place and Route) of the VERILOG code is carried out on Xilinx - Project Navigator ISE 12.3 software.
Title: Vehicle Tracking System Based on GPS Modem (Sep’10 to Mar’11)
Description: The basic working principle is the Triangularization of satellite. GPS shows the vehicle's position on an electronic map display which can be an automated and a very delectable method for sports enthusiasts as well as defense and other departments such as crime investigation departments and traffic management.
Title: Dealer Mine Project in asp.net using SQL Server 2008 & C# (Feb’12 to Apr’12)
Description: Website deals with registration and login of an automobile dealer who can add or delete his Company, Models and available Items with the help of database & C# codes. The website gives all details of the dealer viz. identity, location, franchisee, item availability.
IT CREDENTIALS
* Possess good knowledge of Linux, Windows 7, C, MS-Office 2010 and Internet Applications.
* Possess knowledge of Hardware languages VHDL, Verilog and System Verilog.
CO-CURRICULAR ACTIVITIES
* Successfully attained merit certificates in school days and represented district in GK Competition.
* Efficiently worked as class representative for many years during school days and selected as hostel college representative for B.E. 3rd & 4th semester.
* Worked as volunteer in BLOOD DONATION CAMP organized by Manav Sevarth Samiti & Vodafone.
* Fervent to take part in various cultural activities and active participant.
HOBBIES
* Listening to songs
* Watching Movies
* Riding Bikes
* Love to Cheer
PERSONAL PROFILE
Date of Birth: 30th November 1989
Languages Known: English, Hindi and Rajasthani
Marital Status: Single
(Nikhil Gupta)