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Skills: C,C++,Verilog/Vhdl, Exposure to System Verilog

Location:
India
Posted:
August 25, 2014

Contact this candidate

Resume:

Shreyshi Sharma

[pic]

e-id: **************@*****.*** Mob No: +91-

753-***-****

Objective

To become a successful professional in the VLSI field and to work in an

innovative and challenging world where I can utilize my knowledge and

skills.

Technical Skills

Languages : Verilog/VHDL, Perl, C & C++, Exposure to System

Verilog

EDA Tool : ModelSim

Key Points : Memories in semiconductors

Operating System : Windows and Linux

. Exposure to Functional Verification of DDR2.

. Exposed to VLSI flow.

Education Qualification

Course Institute University Score B-Tech Sunderdeep Engineering College UPTU

62.48

Class 12th Kendriya Vidyalaya CBSE

81.60

Class 10th Kendriya Vidyalaya CBSE

90.60

Industrial Training

4 weeks Industrial Training at Northern Railway Headquarters.

(2013)

Completed 4 weeks mandatory unpaid practical training in Northern Railway

Head Quarters Office, Baroda House, New Delhi a public sector enterprise

from 17th June,2013 to 16th August,2013 successfully. During the training

the company provided us the practical knowledge of Network management

system, Telecommunication and Automation systems.

Final year project: S.ONE A MULTIFUNCTIONING ROBOT

(2014)

The project aims at designing a robot which is capable of running in narrow

road and tunnel, rolls on the zip line using its hand which is a self

clasping mechanism. The designed robot is capable of providing critical

movements during war, natural disaster or manmade disaster. The reliability

of the robot depends upon the type of sensors or detectors being used. The

robot platform has been designed to be versatile enough to work with any

detector installed onto it.

Verification of DDR2 SDRAM functions

(2014)

This project includes the functional verification of RTL code of DDR2 RAM.

The verification was done by creating testbench in System Verilog/Verilog

code to check the various functionality of the design areas like read,

write, precharge, refresh, selfrefresh etc. It requires a simulator and

compiler to verify the inputs and outputs of the design. The software used

for compilation and simulation of codes in this project was ModelSim, which

is one of the popular softwares available online in student version from a

well known EDA vendor Mentor Graphics.

Achievements

Academic & Sports

> Awarded first position in 10th class academic results.

> Achieved gold medal in Shot put and basketball in school competitions.

> Proactive member of College event management team.

Personal Details

Name : Shreyshi Sharma

Father's Name : Satyendra Sharma

Mother's name : Daya Sharma

Permanent address : G-167 Govindpuram, Ghaziabad, Uttar Pradesh,

201001

Declaration

I, Shreyshi Sharma, hereby declare that all the information furnished

above is true according to best of my knowledge and belief.

Shreyshi

Sharma

(Ghaziab

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