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Project Pvt Ltd

Location:
Suri, WB, India
Posted:
September 23, 2014

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Resume:

Mallikarjuna P

Email: *****.***@*****.***

Phone: +919*********

Experience Summary

2.8 years of experience in the field of System Testing with core skills in

the following areas:

. Experience on Device Functionality testing and Library API Testing.

. Gained knowledge on AT commands and RAT(Radio Access Technology).

. Experience on Functional Testing, Regression Testing, Integration

Testing.

. Gained knowledge on Message Digest Algorithms SHA1,SHA2, Cipher suites,

OpenSSL, Certificate generation and Authentication verification.

Different version of SSL/TLS, SSL3.0, TLS1.0 and TLS1.1.

. Experience of Testing & Debugging of Embedded systems firmware using

Simulators.

. Hands on communication protocols like CAN,TCPIP,SSL.

. Designed Test cases for Verix evo Patch.

. Building application using Shared and Static library with RVDS compiler.

Technical Skills

Languages C,C++

Operating Systems Linux, Verix OS, Windows

Scripting language Bash Shell Scripting

Communication Protocols CAN,SSL

Tools Coverty,WireShark, Keil

Version Control JIRA,Ontime

Compilers ARM RVDS 4.0,GDB,BDI2000 GNU Debugger

Work Experience:

. Working at Verifone India Pvt Ltd from Collabera technologies since

August 2013 to till date

. Worked at Magnum Technologies Pvt. Ltd., since July 2012 to Aug 2013

under software Development and Testing.

. Worked at Vaakya Technologies Pvt. Ltd., since Aug 2011 to June 2012

under software Development and Testing.

Educational Details

MS in Embedded Systems from MCIS, Manipal University, Manipal.

B.E in Electronics and Communication from Vijayanagara Eng. College

Bellary.

Project Summary:

Project #1 : TCP/IP Library

Language used : C

Tools used : WireShark,OpenSSL, VisualC++

Description:

VeriFone's Verix V TCP/IP contains application level TCP/IP library,which

will do the TCP/IP communication on different communication media.This

library also have OpenSSL libraries ported into Verix V which helps to do

secure communication. This helps to authenticate and encrypt communication

to payment servers.

My Roles:

. Validation of SSL Communication on TLS1.0,TLS1.1 and SSL3.0 client and

server sockets using different ciphers.

. Ensure that enhanced SSL supports flash/Ram-based client certificate and

key file.

. Generation of RSA and DSA certificates with different public key lengths

1024, 2048 and with signature algorithms, sha1rsa, sha256rsa. sha1dsa,

sha256dsa.

. Validation of Server Authentication and Client Authentication

. Ensure that SSL verifies certificate activation and expiration.

. Ensure that the TCPIP library can do OCSP validation and report the

server certificate status as either good or revoked or unknown.

. Validating all the above scenarios in both static and shared TCP/IP

library.

. Used Wireshark tool to verify, SSL/TLS versions, cipher suite selected,

signature algorithm of the certificate, and OCSP certificate status.

Project #2 : Verix evo Patch.

Language used : C

Tool used : PatchUTIL

Description:

VerixeVo Patch can create a patch of the two versions and allow user to

download only the changes between two versions of software, which could

significantly reduce the amount of data being downloaded and thus saving

cost to download & upgrade the software.

My Roles:

. Requirement analysis and preparation of SRS, SDD and Test Plan.

. Integration and module Testing.

. Configuring and Importing VxPatch to Remote Server.

Project #3 : Design & Development of System on Board.

Client : DRDO Bangalore

Language used : C

Description:

The project deals with design and development of Test Jig Board based on

the ADSPBF-548 processor and Altera Cyclone III. The CAIR Test Jig Board

has the following Interfaces 10/100 Ethernet,RS232,CAN bus,Graphics

Display port, Keypad,Dallas 1-wire, Buzzer, USB Host. The board

accommodates a ADSPBF-548 Processor, Cyclone III FPGA, Configuration PROM,

SDRAM, FLASH, 2-FIFOs, CAIR IC, Microprocessor supervisory circuit,

Oscillators, iButton probe, GPIOs, General Purpose LEDS and 70 pin

connectors.

My Roles:

. Involved in testing, debugging and interfacing of CAN,IBUTTON, GLCD and

KEYPAD and 1-WIRE Communication protocol.

. Tested Firmware code in 'C' for validation of all above interfacing

devices.

Project #4 : WireXpert

Client : Psiber

Language used : C, Java

Description:

This project is to implement and test the Functionality of Embedded Units.

Main aim of this Embedded Device is to detect the Length of Fiber cable,

Gain, loss, Resistance, Insertion loss, Cable Limit, Damage of the cable &

Display Plots on LCD display of the Device.The Test records from device

Database are loaded to Desktop PC where ReportXport Application Software

runs & Test Records are tested and Verified. Hierarchy Creation, Importing

Records, from USB to PC & Verifying & Validating the PDF & Csv files.

My Roles:

. Involved in Validation.

. Written Test Cases and involved in reviewing Test Cases.

. Prepared Defect Report and effectively communicated bugs using JIRA.



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