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Project Summer Training

Location:
Bangalore, KA, India
Salary:
30000 per month
Posted:
July 03, 2014

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Resume:

CAREER OBJECTIVES

My objective is to find myself in an environment that is intellectually stimulating, that challenges me every day

and pushes me on to achieve newer heights.

I aspire for a dynamic career in a challenging environment with tremendous potential for personal and

organizational growth.

Academic Qualification:

QUALIFICATION BOARD YEAR PERCENTAGE

M.Tech( VLSI, ECE ) NERIST 2014 73.12

B.Tech (Electronics and Tele-comm RTMNU 2010 61.32

Engineering)

Senior Secondary C.B.S.E 2006 65.2

Matriculation S.E.B.A 2005 79

Certifications

• Embedded systems and VLSI Design in Robotics (IIIT Pune)

• Six Weeks summer training in Verilog & FPGA (DKOP Labs Pvt. Ltd.)

• Workshop on Xilinx FPGA Architecture & Design Flow 2013 in IIT GUWAHATI.

• Participated in National Children’s Science Congress.

Software Proficiency

• Languages : C, Verilog HDL, VHDL

• Operating Systems : Window 2000, XP, Vista, window 7,8, Ubuntu

• Software Tools : CADENCE, TANNER EDA, COMSOL, XILINX,

SENTAURUS TCAD.GEP

Area of Interest

Electronic Devices & circuit,

Nano Devices,

Low power Application,

Digital Circuits

Project Profile

• Project Name (MTECH) : GEP based classification of biological data.

Project Details

• We classified biological data by using GEP and design the system by using VHDL. Also tried for the

hardware implementation of the circuit.

Strengths

• Comprehensive problem solving abilities, good verbal and written communication skills, ability to deal

with people diplomatically, hard working.

• Good listener.

• Responsible and creative.

Other Qualification:

• GATE Qualified(2012): Percentile 94.2

Score : 362/1000

PUBLICATION

• “GEP Based classification of biological data”, IGTET 2014, Assam Don Bosco University.

REFERENCES

Available on request

Place:

Date:

(KAMAL JYOTI PATHAK)



Contact this candidate