Project School

E-*-*** ROSE RHYTHM APARTMENT,

ADITYA RASTOGI PIMPLE SAUDAGAR

PUNE-411027

Mobile phone: +91-839*******

Email- ****************@*****.***

CAREER OBJECTIVE

To work in association with professional groups who offer me the opportunity for career advancement and

professional growth through continuous effort, hard work and innovative approach.

EDUCATIONAL BACKGROUND

EXAMINATION/ BRANCH/ UNIVERSITY/ COLLEGE/ MARKS/ YEAR OF

S.NO

COURSE FIELD SCHOOL GRADE PASSING

CDAC –ACTS, Pune 70%(GRADE – A)

1 PG DIPLOMA VLSI Design JAN 2014

Electronics and GGSIP University/ G.B.PANT

2 B.TECH Communication Govt. Engineering College 81.41%(aggregate) 2013

Engineering (New Delhi)

C.J.D.A.V. Public School,

AISSCE(12th)

3 Science 81.00% 2008

Meerut ( Uttar Pradesh)

C.J.D.A.V. Public School,

AISSE(10th)

4 89.40% 2006

Meerut ( Uttar Pradesh)

TECHNICAL SKILLS

1. Hardware description languages - VHDL, VERILOG

2. EDA tools knowledge - XILINX ISE 12.2, MODEL SIM 6.3, QUESTA SIM 6.6,

MICROMAGIC MAX (0.25um), IRSIM, NGSPICE

3. Operating systems - LINUX, WINDOWS

4. Scripting languages - PERL, SHELL

5. Programming languages - C, C++

6. Interests - FPGA architecture, Memory architecture, PCI Express architecture,

USB Architecture, ETHERNET architecture, ASIC design flow, Static Timing Analysis.

.

PROJECT DETAILS

Prepared a project based on “FPGA IMPLEMENTATION OF ADVANCED ENCRYPTION SYSTEM (128-BIT)

1.

ALGORITHM” using VERILOG.

Team size: 4

Prepared a major project in B.TECH on “ULTRASONIC TARGET DETECTION SYSTEM”.

2.

Team size: 4

Prepared a minor project in B.TECH on “OPTICAL FIBER COMMUNICATION SYSTEM”.

3.

Team size: 4

Made a small ROBO-car for the ROBOWAR event at ENTHUSIA, 2011 organized by SAE, INDIA.

4.

Team size: 3

ACHIEVEMENTS

1. Secured first position in PG DIPLOMA IN VLSI DESIGNING (CDAC ACTS, PUNE).

th

2. Topper in college in B.TECH (4 year) with 87.93%.

3. All India Rank-10 in C-CAT EXAM.

4. Participated in ROBOWARS and JUNKYARD WARS event held at college and qualified for finals.

5. Participated in inter school MATHEMATICS OLYMPIAD and won Memento.

6. Passed the preliminary round in NATIONAL SCIENCE OLYMPIAD CONTEST.

TRAINING AND WORKSHOPS ATTENDED

NAME OF THE ORGANISATION COURSE CONTENT DURATION

Working of different types of

ADROIT CONTROL ENGINEERS,

Sensors and Relays. 6 W eeks

NEW DELHI.

GSM architecture, GPRS

ZEPHYR SYSTEM PVT. LTD.,

architecture, modulation, 6 W eeks

NOIDA.

FDMA,TDMA,CDMA etc.

NEXT SAPIENS Robotics and Embedded systems 2 days

PERSONAL IDENTITY

Name : Aditya Rastogi

Father’s name : L K Rastogi

Sex : Male

India/ 15th august 1990

Place/Date of Birth :

Marital Status : Single

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