CURRICULAM VITAE
GOKULAKANNAN.N
Periyakadu,
Navallur(po),
Attur-636116.
Mobile:965-***-****
Email: *****.***@*****.***
CAREER OBJECTIVE
To obtain a challenge that offers mean opportunity to utilize my knowledge and skills to
grow with the organization.
EDUCATIONAL QUALIFICATIONS
M.E (VLSI Design), KCG. College of Technology, Chennai- 97, affiliated to Anna
University Chennai – 25; CGPA : 74 (up to 3rd Sem), First Class, 2012 – 2014 Batch.
B.E (Electronics and Communication Engineering), Rajalakshmi Engineering
College Thandalam, affiliated to Anna University - Chennai – 25; CGPA : 68%, first
Class, 2008 – 2011 Batch.
D.E.C.E (Electronics and Communication Engineering), Maruthi Polytechnic
College-deviyakurchi, affiliated to DOTE Chennai – 25; CGPA : 86.5%, First Class with
Honors, 2005 – 2008 Batch.
SSLC at Vivekananda Matriculation Higher Secondary School Attur,
Board : Matriculation, Aggregate : 54 %, Second Class, Completed in April 2005.
SKILL SET
Programming Languages: Verilog, VHDL and C.
Operating Systems : Windows XP, Windows 7,8 and Linux.
AREA OF INTEREST
VLSI Design.
Communication Systems.
Digital electronics
ACADEMIC PROJECT WORK
TITLE : CDMA BASED DATA TRANSMISSION USING GOLD SEQUENCES IN
VERILOG.
In modern communication system, spread spectrum is playing an increasingly
important role day by day due to its inherent advantage like noise immunity and also due its
practical application like CDMA. This project aims to generate gold sequences and modulate a
message signal to produce a corresponding spread baseband modulated signal which is actually
used in much higher proportions for transmission of data signal in technologies like CDMA.
The project also incorporates a receiver unit which demodulates the entire received signal with
the assistance of the same gold sequences to generate the original message signal. In this
proposed work, we simulate the functionality of CDMA system on Xilinx ISE platform. Here,
we use gold sequence encode/decode technique for encryption and decryption. The simulation
results show the working of CDMA transmitter and receiver on Verilog platform.
Software Used : Xilinx.
ACHIEVEMENTS
Got third place in “TAMILNADU INTER ENGG. SPORTS” for volleyball.
Two times runners in “ANNA UNIVERSITY ZONAL”.
PERSONAL DETAILS
Father Name : NATESAN.P
Date of Birth : 08.11.1989
Age : 24 Years
Sex : Male
Languages Known : English, Tamil (Speak, Read & Write)
DECLARATION
I hereby declare that all the details given above are true to the best of my knowledge and, if you
give a chance, I would work with the best of all my will and enthusiasm for the betterment of
the concern.
Date: Yours sincerely,
Place: Chennai (GOKULAKANNAN N)