Hadi Mohammady

**** ******* **., ********* *******, IL 60004

acd9hg@r.postjobfree.com Cell 510-***-****

OBJECTIVE: Challenging position in Design of Digital

Circuit/Microprocessor-Based systems and CPLD/FPGA Design.

SUMMARY OF QUALIFICATIONS:

. 18 years of industry experience including various aspects of hardware

design

. Expertise in Verilog and VHDL coding (RTL, structural and behavioral)

. Developing test plans, test benches. Quick test writing and setting up

verification environment.

. Working knowledge and experience with various EDA tools including DX-

Designer,Orcad, ViewLogic, Altera, Xilinx's FPGA & EPLD tools, Cadence

VXL, Modelsim and Silos simulation environment, Unix, C and Assembly

Language(s).

. Knowledgeable in Ethernet Protocols.

. Writing test cases in Verilog and VHDL.

. Designed CMOS RF tuner using Broadcom BCM3415/BCM3401.

. Other Skills: HARDWARE DIAGNOSTICS using LOGIC ANALYZERS and

OSCILLOSCOPE.

EDUCATION AND TRAINING:

1987 BSEE in Electrical Engineering, University of Arizona,

Tucson, AZ

1990-2001 Electrical Engineering design coursework at UCSC, SJSU and UC

Berkeley, CA

2002 Cadence class on Advance Virology San Jose, CA

2002 Or CAD Layout Class, Cadence, San Jose, CA

2002 Design Verification with Virology HDL, PCS, Mountain View, CA

2005 Completed following Xilinx courses: Fundamentals of FPGA Design,

Designing for performance, and Advanced Virolog.

2006 Completed following Xilinx courses: Embedded System Development and

Designing a Logic Core PCI Express system.

EXPERIENCE:

12/2012-Present Senior R&D Design Engineer, Nokia Siemens Network .

Arlington Heights, IL

Responsible for design of LTE New Generation Base stations. Involved in

Design of the Site control processor (SCP) card of Liquid Radio Cloud

product. For design of SCP Controller card used Cavuim Processor, DDR3

SDRAM, Altera cyclone V FPGA, Litace CPLD for control logic, LXP PEX-6809

PCIE Switch, Atheros AR8033 10/100/1000 Mbps Ethernet Transceiver, Cortina

CS4322 Quad RXAUI or Dual XSUI physical layer Ethernet transceivers, Ti

UCD90124N 12-raia power supply sequencer, and Ti CDCM6208 clock Generator

components . Involved in activities to take design from concept to

including schematic design, new component selection. Working with other

Hardware engineers, System architects and suppliers to ensure platforms

meet requirements for feature set, functionality, cost, regulatory

compliance and industry standards.

5/2010-6/2012 Senior Design Engineer, Sun Power Circuit Inc. Fremont, CA

Responsible for design of Solar Inverter System, design the Microcontroller

system Module of the inverter. For the design of this System's Main

Controller card used Atmel AT32UC3A0512 a complete System-On-Chip

microcontroller based on the AVR32 UC RISC Processor, xilinx's XC95288XL

CPLD for control logic and National semiconductor's DP83848j single-port

10/100 physical layer Ethernet transceivers components. Involved in

activities to take design from concept to including design, new component

selection, board layout. Working with other Hardware engineers, System

architects and suppliers to ensure platforms meet requirements for feature

set, functionality, cost, regulatory compliance and industry standards.

8/2009-5/2010 Design Engineer, Sierra Nevada Corporation, Littleton, CO

Responsible for design of Satellite System's Main Controller card, power

supply Module and Avionic Interface Module for the IPDR (Intelligent Power

Data Ring) system. For the design of this System's Main Controller card

used Leon3 Processor, Xilinx Vertexes 2V6000 FPGA components. Involved

in activities to take design from concept to including design, new

component selection, board layout. Working with other Hardware engineers,

System architects and suppliers to ensure platforms meet requirements for

feature set, functionality, cost, power, regulatory compliance and industry

standards.

1/2008-8/2009 Design Engineer, Sierra Nevada Corporation, Rancho Cordova,

CA

Responsible for design of System's Main Controller card and DC/DC power

supply for the Jamming system. For the design of this System's Main

Controller card used Scale PXA270 Processor, Xilinx Spartan-3 XC3S4000

FPGA, Tundra Tsi148 PCI/X-to-VME Bus Bridge, Marvel Link Street 88E6065 low

Power 10/100 Switch components. Involved in activities to take design from

concept to including design, new component selection, board layout.

Working with architecture team, cross-functional teams, engineering teams

and suppliers to ensure platforms meet requirements for feature set,

functionality, cost, power, regulatory compliance and industry standards.

5/2006-12/2006 Design Engineer, Intel Digital Health group, Beaverton,

OR

Responsible for design and cost reduction of Intel's mobile Digital Health

terminals that was based on Intel? Microprocessor and PC architectures.

Worked on product and system level requirements as well as system and

subsystem specifications and system integration and execution plans.

Involved in activities to take their rev. B platform from concept to

production including design, new component selection, board layout, fab,

system build, debug and validation. Working with architecture team, cross-

functional teams, engineering teams and suppliers to ensure platforms meet

requirements for feature set, functionality, cost, power, regulatory

compliance and industry standards.

2/2005-4/2006 Design Engineer, Watt minder Yang Associates, Sunnyvale,

CA

Responsible for design of real-time Data Gathering analyzer system

(MASTER_DAQ) for Solar power System. Designed the MASTER_DAQ power

analyzer using dsPIC30F6012 Microchip microcontroller, Dalas DStinis400

network module and integrated on board battery charger using maxim MAX1776.

1/2003-6/2004 Hardware Engineer, Canberra Corp., Santa Clara, CA

Responsible for design of DS3 line card and DC/DC power supply and signal

integrity verification for GSN-100 10Gbsec Active Network Router. Assisted

in the logic design for the Router's Mother board using Alter CPLD and

Xilinx Vertex II FPGA components. The mother board design was based on the

MMC7500 chip set for Traffic management and Broadcom (Subtype) BCM1250

processor used for control process functions.

10/2002-1/2003 Application Engineer, Novas Software, Inc., San Jose, CA

The company specializes in debugging solutions for complex IC, Soc, and

FPGA designs

. Testing of Verdi - debugging tool for Verilog and VHDL designs.

. Write and execute test cases in VHDL for functionality testing of the

product.

. Identify software anomalies and defects and report them to developers.

Follow up with known problems until satisfactory resolution.

6/2001-9/2002 Design Engineer, Misck Technology Inc., Santa Clara, CA

. Primarily responsible for design & development of Handheld PC products

based on the Embedded National/Cyrix Geode TM SC3200 Web PAD TM on a Chip

Enhanced Processor and the DP83815 10/100 Mb/s Integrated PCI Ethernet

Media Access Controller and Physical Layer (Memphite).

. Began project from conceptual design, specifications to part search.

5/2000-6/2001 Design Engineer, Com21 Inc., Milpitas, CA

. Responsible for design & development of Com21's Denali, Cyclone and

Baxter Cable Modem communication products. Systems based on Broadcom

BCM3350, BCM3345, BCM3352 Low Power Embedded Controller, Broadcom

BCM3415/BCM3401 CMOS RF tuner solution, Broadcom HPNA iLine chipset

BCM4210 & BCM4100, Ti Digital signal Processor TMS320C5409, AMD quad SLAC

(Codec), and Intersil ringing SLIC (Subscriber Line Interface Card).

. Began the project from conceptual design, specification, part search,

prototyping, H/W test and bring-up was the sole hardware engineer on the

project. Drove the board through placement / CAD, and assembly. Also

worked in conjunction with software developers through design, debugging,

and system integration phases.

7/1997-5/2000 Design Engineer, WYSE Technology Inc., San Jose, CA

. Involved directly in design & development of IULC Wyse Technology's

Windows Based Terminals based on Intel Low Power Embedded Pentium

Processor and SIS520 Pentium VGA/PCI/ISA Chipset(s).

. Worked on project from conceptual design to specification, part

search, prototyping, H/W test and bring-up, compliance testing to

product release, drove the board through placement/CAD, and assembly.

. Worked closely with diagnostics and software developers through design,

debug, integration and test phases. Assisted in design & completion of

LEO and UTC Winter projects based on the National/Cyrix Media GX MMX-

Enhanced Processor and CX5530 VGA/PCI/ISA Chipset(s).

. Also worked on design of Wireless Terminal (Handheld light weight

Wireless PC which connects to server via radio frequencies) based on the

String arm SA-1100 Microcontroller RISC processor and design of the USB

To Four RS-232 Serial Port Hub projects.

10/1990-6/1997 Design Engineer, Clinks Corporation, Sunnyvale, CA

. Team member of microprocessor based board level and programmable logic

designs of Clink's Telecom/WAN (T1, E1, NRZ, EIA-530, X.21) High speed

Encryption products using the latest design tools (Orcad, View Logic,

Alters, Xylem's FPGA & EPLD tools and able).

. Responsibilities included development of new line from concept through

design to production through debugging including hardware specification

matching, design trade off, component selection, and design verification.

. Interacted extensively with marketing, software engineering, and

manufacturing.

Hardware/Software Test Design Engineer

. Responsible for design of automatic test equipment for Clink's FT1-ACSU

(Fractional T1 Advance Channel Service Unit), Low Speed & High Speed

Encryptions.

. Also developed the software test plan(s) and production test procedures.

1/1988-10/1990 Design Engineer, Advanced Information Concepts, San

Jose, CA

. Responsible for the complete design and development of a SCSI (Small

Computer System Interface) host adapter for the PS/2 Micro Channel

computer system.

. Took project from initial specification stage through the final

production release.

. Assisted with customer service technical support, manufacturing with

engineering oversight.

PERSONAL:

. Citizen of the United States.

. Would consider relocating within the US or internationally

References Available Upon Request

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