m.tech in vlsi design

Curriculum Vitae

Name: DILHA BABU

Mobile: +91-949*******, +91-720*******

Residence: +91-495-*******

E-Mail: *****.****@*****.**

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AN OVERVIEW

< Pursuing M.Tech. - VLSI Design and Embedded system .

< B.Tech. - Electronics & Communication

< Successfully completed project on FPGA IMPLEMENTATION OF SECURE STREAM

CIPHER USING NFSR, S-BOX IMPLEMENTATION IN AES ALGORITHM USING COMPOSITE

FIELD ARITHMETIC.

< Well versed with Hardware, Software, Electronics, Semiconductor, etc.

< Good understanding of VHDL, Verilog.

< Proficiency at grasping new technical concepts quickly

< Believe in continuous learning and an innovative approach.

< Adaptable and a quick learner; possesses skills to work under pressure.

ACADEMIC CREDENTIALS

2014 M.tech in VLSI design and embedded system

2012 P.G Diploma in VLSI & Embedded Hardware Design conducted by National

Institute of Electronics and Information Technology (NIELIT), Calicut,(formerly CEDTI, Calicut), an Autonomous Scientific Society of DIT,

the Ministry of Communications and Information Technology, Govt. of

India; involved in Training, R&D and Consultancy Services)

2011 Bachelors in Engineering - Electronics & Communication Engineering

from co operative institute of technology, Vadakara Secured 69.63 %

aggregate

2005 H.S.C. from St. Thomas H.S Thottumukkam, Kerala State Board. Secured

84.3%.

2003 S.S.C. from St.Sebastion's H.S.S Koodaranjhi, Kerala State Board.

Secured 87.5 %.

IT FORTE

Languages : C, Assembly, VHDL, Verilog HDL

Operating System : Windows

VLSI & Embedded System : FPGAs (Xilinx & Altera), Microcontroller(8051,

PIC)

EDAs Altera Quartus II, Xilinx ISE,

Modelsim SE, MATLAB, Keil C,Pyxis,eagle

PROJECTS

Project 1

Title : BLACK BOX FOR SMART VEHICLE

Durations : 1 year

Team size : 4

Language : Assembly

Description :

It is an embedded product which displays speed, mileage, fuel level and

engine temperature of a vehicle. Also, an accident alert system included

in it.

Project 2

Title : FPGA Implementation of secure stream cipher using NFSR

Durations : 2 months

Team size : 2

Language : Verilog

Description : Proposed a secure stream cipher using a Non-linear

Feedback Shift Registers (NFSR). The shift register structure used is based

on clock control generator. Also, decryption of the stream cipher is also

done.

Project 3

Title : S-BOX implementation in AES algorithm using composite

field arithmetic

Durations : 1 month

Team size : 4

Language : Verilog

Description : In Advanced Encryption Standard algorithm, the

substitution byte values are

Obtained by using composite field arithmetic. This approach consumes less

area compared to look up table approach.

BEYOND CURRICULUM

> Active member of College N.S.S Unit.

PERSONAL VITAE

Date of Birth : 18/05/1989

Father's Name : Babu Thomas

Marital Status : Single

Sex : Female

Languages known : English, Malayalam, Hindi

Residential Address : Chekkakuzhiyil (h), Thottumukkam (po)

areacode (VIA),673639

REFERENCE

Mr.Sanjay Kumar Bagath

Assistant professor

TJIT,Banglore

560083

Email: ****@**********.***

DECLERATION

I hereby declare that the above information is true and

correct to the best of my knowledge and belief.

Place:Banglore

Sincerely,

Dilha Babu

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