Project High School

Iksha Khare Current Address:

Contact:+91-955******* Metro Eleganzsa Apartments, Flat#312,

6th Cross, RHB Colony, Mahadevapura Post,

E-mail: *****.*****@*****.***

Whitefield, Bangalore-560048

Objective

To be a part of the organization where my abilities and skills can be used to the optimum so that it helps in

the growth of the organization and myself.

Summary

• PG Diploma in VLSI from CDAC ACTS Pune.

• B.Tech. in Electronics & Communication from GBTU.

• One month summer training from BHEL Jhansi on “CNC”.

• Seminar delivered on “Touch Screen Sensor”.

• Participation in two days workshop on “Matlab & it’s application”.

Key skills

• Vhdl,Verilog,C,C++ Language.

• Linux/ Unix Operating System

• Assembly language programming (8085).

• IE3D (Zeeland) Software.

• Questasim6.6d, Modelsim6.3f, Emacs 23.1, Xilinx12.3, Micro magic tool(circuit layout

designing).

Areas of interest

Digital Electronics, Vhdl, Verilog, Cmos, Microprocessor (8085).

Education summary

•

PG Diploma in VLSI from CDAC ACTS PUNE with an aggregate of 65% in august 2013.

• Professional Qualification

B.Tech. in Electronics & Communication from GBTU with an aggregate of 68.7%.

• Academic Qualification

Intermediate with 59% from UP Board in 2008.

High school with 69.5% from UP Board in 2006.

Project work

• Design & verification of I2C interface (inter integrated circuit bus) using Verilog.

• Design and analysis of micro strip low pass filter using computer aided design.

Project Title: I2C Bus Interface.

Project Description: I2C is a two-wire, bidirectional serial bus that provides efficient method of data

exchange between devices. The I2C bus physically consists of 2 active wires. The active wires, called SDA

and SCL, are both bi-directional. I2C implements master-slave configuration. Each of these devices

connected through sdl & scl can act as a receiver or transmitter, depending on the functionality Verification

environment comprises of a master generating control signals and memory as slave on which described

operation is performed through I2c interface.

Design Features:

• 2 modes: Master-Transmitter and as Master-Receiver.

• Bidirectional data transfer.

• Start/Stop signal generation/detection.

• Supports 7 bit addressing.

Platform:

• Designing and Verification in Verilog.

• Target Device: Xilinx Vertex 4.

• Synthesis tool: Xilinx ISE 12.3,Simulation tool: Questasim.

Micro strip Low Pass Filter:

• Filter is fabricated on glass epoxy material having dielectric constant of 4.2

• Filter having cut off frequency of 2GHz.

• Simulation is done using IE3D(Zeeland) software.

Awards and achievements:

• Elected as school vice-captain in my school.

• Co-ordinate various events in my school fests.

Strengths:

• Positive Attitude.

• Good communication skills.

• Self confident and Optimistic.

• Best Team Work Skill.

Personal Information:

• Nationality : Indian

• Sex : Female

• Date of Birth : 5th april, 1991

• Hobbies : Listening to Music and net surfing.

• Language : English, Hindi.

Permanent Address: D 81, New Avas Vikas Colony

Kanpur –Road, Jhansi (UP) 284001

Reference:

Mr. Mukti Kant Khare

AGM BHEL, Jhansi (UP.)

*********@*******.**.**

I hereby declare that above mentioned information is correct up to my knowledge and I bear the

responsibility for the correctness of the above mentioned particulars.

Place: Jhansi

Date: (IKSHA

KHARE)

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