Design Project
Resume:
Pushpa
kongu nagar
S.vellalapatti(po),
Email: ***********@*****.***
Karur-639004
Mobile: +91-973*******
Summary of Qualifications
> Good understanding of the ASIC and FPGA design flow
> Experience in writing RTL models in Verilog HDL and
Test benches in SystemVerilog
> Very good knowledge in verification methodologies
> Experience in using industry standard EDA tools for the front-end
design and verification
VLSI Domain Skills
HDLs: Verilog and VHDL
HVL: SystemVerilog
Verification Methodologies: Coverage Driven Verification
Assertion Based Verification
TB Methodology: UVM
EDA Tool: Modelsim and ISE
Domain: ASIC/FPGA Design Flow, Digital Design
methodologies
Knowledge: RTL Coding, FSM based design, Simulation,
Code Coverage, Functional
Coverage, Synthesis,
Static Timing Analysis, ABV
Professional qualification
Maven Silicon Certified Advanced VLSI Design and Verification course
from Maven Silicon VLSI Design and Training Center, Bangalore
Year: August 2013
Bachelor of Engineering: Chettinad College of engineering and technology
Anna University, Tamil Nadu, India
Discipline: Electronics &
communication Engineering
Percentage: 87% First Class
Year: May
2013
Achievements
> Got first prize in painting competition which was organized by
Jawaharlal Nehru Children's Club in Chennai during the year 1998.
> Participated in the inter college project exhibition held at
K.S.Rangaswamy College of Technology on 29th March 2012 and exhibited
the hardware kit project entitled Digital Visitor Counter.
> Got second prize in painting competition and slogan contest in
district level for the International Earth Years (2007-2009) which was
organized by the Rotary Club of Karur
Experience
August 2013- December 2013, Maven Silicon, VLSI Design and Training Center
VLSI Projects
Dual Port RAM - verification
HVL: System Verilog
EDA Tools: Modelsim, Questa - Verification Platform and ISE
> Implemented the Dual Port Ram using Verilog HDL independently
> Architected the class based verification environment using system
Verilog
> Verified the RTL module using System Verilog
> Generated functional and code coverage for the RTL verification sign-
off
Router 1x3 - RTL design and Verification
HDL: Verilog
HVL: SystemVerilog
EDA Tools: Modelsim, Questa -- Verification Platform and ISE
Description: The router accepts data packets on a single 8-bit port called
data and routes the packets to one of the three output channels, channel0,
channel1 and channel2.
> Architected the design and described the functionality using Verilog
HDL.
> Architected the class based verification environment using system
Verilog
> Verified the RTL model using SystemVerilog.
> Generated functional and code coverage for the RTL verification sign-
off
> Synthesized the design
General-Purpose I/O (GPIO) Core - RTL Design and Verification
HDL: System Verilog
EDA Tools:
Modelsim, Questa - Verification Platform and ISE
Description: The GPIO IP core is user-programmable general-purpose I/O
controller. Its use is to implement functions that are not implemented with
the dedicated controllers in a system and require simple input and/or
output software controlled signals.
> Architected the design
> Implemented the RTL using Verilog HDL
> Verified the RTL using System Verilog
> Generated functional and code coverage for the RTL verification sign-
off
> Synthesized the design
Engineering Projects
> Wireless crop field monitoring using zigbee:
Description: This project is based on monitoring the crop field area
without man power. This project is about how to utilize the sensors in
paddy crop field area based on Wireless Sensor Network (WSN), ZigBee
technology.
> Digital Visitor Counter:
Description: Digital visitor counter is a reliable circuit that takes
over the task of counting Number of Persons/Visitors in the Room very
accurately. When somebody enters into the Room then the Counter is
Incremented by one and when any one leaves the room then the Counter
is Decremented by One. The total number of Persons inside the Room is
displayed on the seven segment displays.
The microcontroller does the above job it receives the signals from
the sensors, and this signals operated under the control of software
which is stored in ROM
References
On Request
Contact this candidate