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Engineering Project

Location:
TN, India
Posted:
December 13, 2013

Contact this candidate

Resume:

Henrick Jerome .T

Current Address:

No.***, Strahans Appartments,

Strahans Road, 2nd Floor

Pattalam

Chennai - 600 012

*************@*****.***

Phone: 900-***-****, 044-********

Objective:

A Challenging position in a results-oriented company that seeks an

ambitious and career-conscious person, where acquired skills and education

will be utilized towards continuous growth and advancement.

Education:

Course of School / Board / Year of Percentage of

Study College University Passing Marks/Ability

ETO Amet University AMET Good

University 2013

Bachelor of Jaya Engineering

Engineering in College, Chennai ANNA May 2011 62%

Electronics University

and

Communication

Don Bosco

Higher Matriculation State Board April 2007 71%

Secondary Higher Secondary

School School, Egmore

Don Bosco

Secondary Matriculation Matriculation April 2005 73%

School Higher Secondary

School, Egmore

Relevant documents:

NO DOCUMENTS NUMBER DATE OF DATE OF EXPIRY PLACE OF ISSUE

ISSUE

1 INDOS 13EL0272 15-03-13 - MUMBAI

Certificate

2 Pass port K3279025 16-05-2012 15-05-2022 CHENNAI

STCW Technical Certifications/Trainings:

Year Course Institute/University/ Certificate Date of Place of

Issuing Authority no. issue issue

2013 First aid AMET University EFA/9116/2013 Chennai

course 04/05/2013

2013 Fire AMET University FPFF/8944/201 Chennai

prevention 3 08/05/2013

and fighting

2013 Personal AMET University PST/10118/201 Chennai

survival 3 30/04/2013

techniques

2013 Personal AMET University PSSR/9496/201 Chennai

safety and 3 11/05/2013

social

responsibilit

y

Certification Course:

Diploma in Software NIIT 68%

Testing and Quality

Assurance

Technical skill set:

Languages : Verilog, Matlab, C#

Operating System: Windows NT, XP.

Packages : MS Office 2007

Motor Overhauling

Tracing circuit fault

Project Description - As Part of Bachelor's Degree Fulfillment.

"PATTERSON'S EAR MODEL USING DIGITAL AUDITORY FILTER"

In this project, we have developed and implemented a low power analog VLSI

architecture for real time signal processing motivated by the principles of

the human auditory system. An analog cochlear filter bank (which is

implemented on the chip) decomposes the input audio signal into several

frequency bands that have almost equal bandwidth on a log scale. This step

is thus similar to computing the wavelet transform. The chip then computes

signal energies and zero crossing time intervals of frequency components in

a cochlear filter bank. The chip is intended to work as a front-end of a

speech recognition system. We include experimental results on a VLSI

implementation of the auditory front-end. We present speech recognition

results on the TI-DIGITS database obtained from computer simulations which

model the functionality of the feature extraction VLSI hardware.

Leadership Skills

. Class Representative, year 2010 - 2011

. Organizer, National level technical Symposium - 'Infractionz', year

2009 -10

. Organizer, National level technical Symposium - 'Infractionz', year

2010 -11

Achievements:

. Won 3rd place in " MATHOMANIA" event held in a technical symposium at

Jaya Engineering College.

. 2nd in high jump (Zonal), hand ball (1st in Zonal, 2nd District).

. Shuttle Badminton and Carrom Champion (Inter school).

Strengths:

. Strong Interpersonal, Communication and Listening Skills

. Ability to work in a team with diverse backgrounds

. Strong commitment to quality

. Determination, Dedication and Discipline

. Willing to learn and adapt to new opportunities and challenges

. Good problem solving skills

Declaration:

I hereby declare that above mentioned particulars are true to the best of

my knowledge and belief.

Reference:

DR.STEPHEN ARPUTHARAJ

DEAN- Electrical and Electronics Engineering Marine

AMET University

Henrick Jerome .T

Date:

Place: Chennai



Contact this candidate