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Engineer Project

Location:
Hyderabad, Telangana, India
Posted:
July 23, 2017

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Resume:

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RESUME

B t s s Sai Prasad,

Mobile : +91-889*******.

Email : **************@*****.***

To work effectively and efficiently in a challenging environment where I could constantly learn and deliver my best to the benefit of the organization and myself.

Name Of

Course

Name Of Board College/School Year Of

Passing

Percentag/

Cgp

Btech - EIE Nagarjuna University Bapatla Engineering college, Bapatla

2016 8.08

Intermediate

(M.P.C)

Board Of Intermediate

Education

Andhra Pradesh

Smt D Indira Junior

College, Tenali

2012 90.90

10th Board Of Secondary

Education, A.P

Sri Sai High School,

Tenali

2010 89

Trained in Embedded Systems, C, C++, Linux, Tcp/Ip

Basics in Iot, Rtos

Trained in Embedded systems from Vector India Institute

Working as Junior Engineer in BHEL R&D from 09-05-2016 till date on Contract basis

Work Profile includes calibration and installation of transmitters, pressure gauges. Commissioning of DCS, loop checking’s by P&ID diagrams observation

.Maintenance of control valves DPT’s, PT’s, flow meters,level indicator, thermocouples and troubleshooting of process instruments in coal gasification pilot plant, boilers, furnace, compressors, VFD’s feeders, analytical instruments like gas chromatograph, element analyser, proximate analyser. Wiring of electrical and instrumentation panel.

Erection & Commissioning of plant based on Project. Career Objective :

Academic Qualifications :

Technical Skills:

Work Experience

2

nat

Title : ALU DESIGINING USING VEDIC MULTIPLIER.

Software : XILINX 14.2.

Description : The motive of the project is to increase the speed of the ALU, By using multiplier design and reduce the complexity of calculation process using MAC (Multiplier with Accumulator) design in Verilog hdl. The whole design of arithmetic module is realized on Xilinx Spartan 3E. The synthesis results show that the computation time for calculating the product of 16x16 bits is 10.148 ns, while for the MAC operation is 11.151 ns. The maximum combinational delay for the Arithmetic module is 15.749ns.

Secured 1st Place in kabaddi Competition in School& college

Secured Best Student award during Engineers Day 2016

Organized and participated in various events (social service activities) conducted by Rotary club.

Worked as a Rotary club president for below 16 years volunteers, Social services.

Active participation in cricket competitions.

Organized KUKA ROBOTICS workshop in our college.

Good at presenting points precisely and clearly.

Preparing schedule for every task and completing within time or before.

Good problem solving ability.

Date Of Birth : 30/06/1995

Father Name : B s l Vara Prasad

Languages Known: English, Telugu, Hindi

B t s s Sai Prasad

Personal Details:

Personal skills :

ExtraCurricular Activities :

Achievements :

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