Post Job Free
Sign in

Software Engineer

Location:
Bangalore, KA, 560035, India
Posted:
April 20, 2013

Contact this candidate

Resume:

Someshwar Mukherjee

***********@*****.***

*********@*****.***

+91-809*-***-***

http://www.linkedin.com/in/someshwarmukherjee

Summary

Nearly fifteen years of total experience - in team leading, management and

design architecting - in the domains of network applications, processor

modeling, toolchain and software for failsafe embedded systems, and more

recently in development of highly scalable and available web services

related to the online payments domain.

Hands on software development experience on multi-core embedded PowerPC

platforms using C. Some understanding of hardware resource virtualization.

Very strong C skills. Very strong understanding of object oriented

methodologies, the C++ STL and CMM practices. Some understanding of the

commonly used GoF Design Patterns and UML.

Fair understanding of SystemC in terms of simulation / modeling of ASIC

chips. Understanding of functional and cycle accurate simulation

technology. Experience in bare metal software executive bringup on multi-

core simulators.

Conceptual and hands-on understanding of Linux kernel internals like

scheduling, process and memory management, threads and IPC. Some experience

in Linux device driver development and testing. Excellent skills in

UNIX/Linux Shell scripting in ksh, bash and tcsh. Some experience in GUI

development using Tcl/Tk and the Microsoft .NET platform. Experience in Tcl

(expect), Python and Perl scripting for testing automation.

Knowledge of compiler development using UNIX tools, viz. Lex (Flex) and

YACC (bison). Extensive knowledge on GNU auto-tools for dynamic build

configuration, viz. autoconf and automake. Knowledge of Makefiles and the

opensource GNU compilation toolchain, viz. GCC.

Basic understanding of embedded router software - packet forwarding, crypto

and pattern matching. Understanding of datapath acceleration hardware of

the Freescale Multicore Network Processing Platform. Operational

understanding and scripting for SmartBits packet injection hardware for

test packet generation.

Programming experience in CAD/CAM software platforms like AutoCAD and

MicroStation. Experience in MicroStation MDL programming language and

AutoCAD AutoLisp.

Proficient in managing project schedules using MS Project and Primavera. On-

site project management experience covering contract management, customer

support and interaction, customer requirement gathering, and payment

collection and leading a team of engineers and contractual laborers for

installation and commissioning of hardware.

Technical Skill Set

Operating Systems Linux (Ubuntu, Fedora and Suse), UNIX

(HP-UX, SCO, AT&T, Solaris), Windows NT

Architectures Intel x86, RISC, SIMD, PowerPC

Programming Languages C, C++, SystemC, Shell, Python, Tcl/Tk, Perl,

Assembly, Lex / YACC, UML, SQL

Databases Microsoft SQL Server 7.0, MySQL

Programming Interfaces Microsoft Visual Studio, #Develop, Rational

Rose, Freescale CodeWarrior

Project Management Tools CVS, GIT, Accurev, MS Project, Primavera

Product Packaging Tools GNU packaging tool chain, InstallShield

Configuration Management GNU automake and autoconf

Quality Control CMM (Level 4), ISO9001-2000

Professional Experience

June 2012 till date: Software Development Manager, Amazon Inc., Bangalore

Sep 2010 - Jun 2012: Manager - Modeling and Firmware, Sandisk (India) Pvt.

Ltd., Bangalore

Feb 2006 - Aug 2010: Sr. Systems Engineer, Freescale Semiconductor (India)

Pvt. Ltd., Noida

Dec 2003 - Jan 2006: Sr. Software Specialist, Celstream Technologies Pvt.

Ltd., Bangalore. (working for Thomson).

Feb 2001 - Dec 2003: Systems Design Engineer, Ansaldo Signal (India) Pvt.

Ltd., Bangalore.

Jun 1998 - Jan 2001: Project Engineer, DaimlerChrysler Rail Systems India

Ltd. (now Bombardier Transportation), Calcutta.

Projects Undertaken (reverse chronological order)

Amazon

Software Development Manager (Jun 2012 till date)

Managing web services development related to the payment services of

Amazon. Worked on managing a team to create upfront payments processing

platform. In parallel, also managed a team involved in secure last-leg

payments autohorisation and authentication with payments processors

(banking institutions). Currently managing a team that deals with refunds

and chargeback payments processing.

SanDisk

Manager - Modeling and Firmware (Sep 2010 to Jun 2012) - Equivalent to

Staff Engineer

Development of a configurable firmware to validate model features.

Design and implementation of an automated performance measurement and

benchmarking framework for the model releases.

Development of serialization framework for existing model codebase. The

design introduces minimal changes in the existing classes. Automatic

implementation of serialization using this framework, deploying Python to

parse the output of GCC-XML and edit the source code on the fly.

Building up of the team; recruitment. Mentoring a team of engineers to

write firmware for model validation.

Creation of test framework to allow co-validation of model against ASIC

simulation.

Freescale Semiconductor

Individual contributor, Networking Software Division (Sep 2008 to Aug 2010)

Implementation of a Linux device driver for IEEE-1588 timer IP in the P4080

SoC. This also entailed modifying the GNU PTPd daemon to use hardware time-

stamping and demonstrate clock sync to ~25ns.

Enablement of access to the P4080 datapath blocks from user-level Linux

processes. This entailed creation of specialized drivers for the IP so that

accesses to the blocks by user land applications are not routed through the

kernel.

Creation and streamlining of quality processes for the software team. Team

gearing up for ISO certification audit.

Development of networking traffic router software with an inbuilt quality-

of-service algorithm. This project primarily showcases the capabilities of

the hardware datapath accelerators of the Freescale P4080 multicore

solution.

Performance optimization of router software for Chinese client Huawei. The

client's code was optimized to give the expected throughput on the

Freescale P4080 multicore platform.

Scripting automation to create a regression framework for running workloads

on simulators and boards. The regression framework supported driving test

input data using Spirent SmartBits as well as standard utilities like

tcpdump / tcpreplay.

Performance analysis of proof-of-concept router software and its

optimization on the P4080 platform. Delivered the optimized code to NSN to

be the starting point for their code development.

Tech Lead, System Performance & Modeling Group (Feb 2006 to Aug 2008)

Validation of P4080 simulator. This involved creation of the validation

framework and writing proof-of-concept test cases. The bulk of test cases

were developed using contracted resources from Wipro. This regression suite

was used as the acceptance test suite for simulator deliveries by Virtutech

(supplying the functional simulator to Freescale).

Bare-metal applications development framework for quick testing of the

P4080 simulator in terms of the functionality of the datapath engines.

Enhancement of build infrastructure for cross-platform building of the

simulator codebase. Removal of old Makefiles and introduction of GNU

automake and autoconf. Porting of base libraries from Linux to Cygwin.

Introduction of thread-safety in the base PowerPC simulator (powersim).

Removal of singletons from the design.

Functional modeling of various IP blocks like PCI-Express, SIRI, SATA etc.

for use in SoC simulators. These simulators are used by the post silicon

bringup teams for generating the golden output during regression testing.

Celstream Technologies

Sr. Software Specialist (Dec 2003 to Jan 2006)

Development of modeling platform (class libraries) for simulation /

validation of a professional video-processing DSP, using TLM and SystemC

(v1.0). The client was Thomson Multimedia, France. The simulator was used

to develop optimized application software (codec processing) before the

hardware was taped out.

Development of an assembler and disassembler for a SIMD DSP core inside a

video processing ASIC. The client was Thomson. The ASIC contained several

RISC cores controlling VLD processors and DSP cores for image processing.

Ansaldo Signal

Systems Design Engineer (Feb 2001 to Dec 2003)

Development of a grammar and its compiler to automate Railway Signaling

interlocking software generation from the yard data. The secondary

objective of the project required development of a PC-based real-time

simulation system for the interlocking. The project was for use within the

company.

Design of control software for a computer controlled signaling system for

MARTA, Atlanta, USA. I was deputed to Pittsburgh for three months to gather

the customer requirements and understand their standards.

Installation, testing and commissioning of control system for yard

signaling control at Sealdah, Eastern Railway, India. I was posted at site

to manage the activities using trained contractual resources. I was also

responsible for getting customer design approvals and payment collection.

DaimlerChrysler Rail Systems

Project Engineer (Jun 1998 to Jan 2001)

Design, installation, testing and commissioning of an automatic (unmanned)

wayside signaling system for Eastern Railway (India) in the Sealdah

suburban section. I was responsible for gathering contractual requirements,

design of the circuits, installation of equipment, testing and

commissioning of the system. I was also responsible for on-site contract

management, payment collection and training of customer personnel for

maintenance of the installation.

Awards

Awarded a Certificate of Recognition in Freescale for efforts to streamline

quality processes.

Awarded "Bravo" in Freescale for simulator validation methodology

development.

Awarded "Master Brain" in Celstream for consistently excellent performance.

Other Freelance Projects

Developed a robotic car in college and controlled it through the COM port

of a PC.

Implemented a data storage device with any ordinary audiocassette tape

recorder with design of an interface card for the PC.

Highly interested in neural networks and fuzzy logic. Experimenting on

artificial intelligence during spare time.

Education

BE (Electrical Engineering) - Delhi College of Engineering, University of

Delhi 1998 69%

AISSCE - Delhi Public School, R. K. Puram, New Delhi

1994 82%

ICSE - St. Xaviers' School, Malda (WB)

1992 88%

Personal Information (sensitive data masked for security reasons)

Date of Birth ## January 1976

Nationality Indian

Sex Male

Work Experience 14 years, 10 months

Passport Number E124 (have non-annotated valid 10-year multi-

entry US business visa)

Email Address ***********@*****.***, *********@*****.***

Present Address Bangalore

Cell: +91-809*-***-***

Web Profile http://www.linkedin.com/in/someshwarmukherjee



Contact this candidate