Engineer Project Manager

Thomas A. Coonan

*** ********* ******

Atlanta, GA 30315

home email: *******@**********.***

http://www.mindspring.com/~tcoonan

Summary

ASIC / SoC Engineer. BEE/MSEE with 17 years experience across Hardware, Software, and ASIC / FPGA areas.

Work History

Scientific Atlanta, Atlanta GA, 6/95 - Present, Senior Staff ASIC Design Engineer

Developed an Audio DSP Processor core for MPEG & AC3 for Set Top Box chip. Designed custom hardware DMA

engines, memo ry controllers, audio formatters around an embedded, customized SPARC processor. Created software

environment and verified this core.

Project Manager for IEEE802.3 MAC core. Architect and manager of a 10/100Base-T MAC core for use in Set-top-

box and Cable Modem product lines. Managed team, verified design, and worked with business and systems groups

to define and monitor this IP. Developed FPGA prototype, used Co-Verification techniques and developed early

drivers for use by SW teams.

Lead Engineer on DOCSIS Cable-Modem ASICs for the high-volume SA Set Top Box and Cable Modem product

lines. This core is also at the heart of STMicroelectronic s STV0396 Cable Modem chip. Developed hardware

architecture and design/test specifications. Personally designed, verified and synthesized this 600,000 gate core.

Intimately involved in Verilog and C-based simulation, synthesis, DFT, and tape-out issues. Used HW/SW co-

simulation including Verisity Specman. Work within a SoC context. Developed several other Set Top Box ASIC sub-

blocks including a high-speed Multiprocessor SoC Bus Arbiter. Author of the popular open source Free-RISC8

Core (www.free-ip.com).

Developed SoC ASIC for LEO satellite data and GPS modems. ASIC based on the OAK DSP Core. Designed,

verified, and taped-out LSI Logic ASIC. Wrote select portions of modem kernel firmware. Used Verilog, Synopsys,

Sunrise ATPG, LSI Logic tape-out tools for ASIC and used GNU C and debugger/emulators for firmware. Also

developed board-level microcontrollers coupled with ASIC.

Developed hardware/software for the Atlanta Traffic Management System showcased at 1996 Olympics in Atlanta.

Designed VHDL-based XILINX FPGAs for mobile digital data GPS radios as well as companion C++ firmware for

embedded PCs and microcontrollers. Developed a wide variety of C/Visual Basic tools for designers and

manufacturing test engineers.

Galaxy Scientific Corp., Atlanta GA, 1/93 - 6/95, Staff Engineer

Software manager/designer for hand-held systems and simulation tools for US and Japanese clients including EPRI

and USAF. Defined, developed and delivered C++ and/or Visual Basic design tools and training systems.

Developed several custom PDA applications for clients including FAA and BOEING.

Colt Technology Inc., Lenexa KS, 3/91 - 10/92, Project Engineer

Lead designer at this custom design/manufacturing house for several client commercial products. Examples include a

complex PID industrial controller, a video frame-grabber board, mobile wireless data loggers, and a line of miniature

digital panel meters. Performed costing, proposals, design, and testing for entire products. Performed wide variety of

HW/SW tasks including SW for microcontrollers and PC, GUIs, comm protocols and HW design using PLDs, FPGAs,

processors and other board-level components.

Galaxy Scientific Corp., Atlanta GA, 12/89 - 3/91, Engineer

Technical lead for PC-based simulation software for Telecom technicians. Built with C++, Expert System (CLIPS),

Graphics libraries and custom script language (LEX/YACC). Responsible for project requirements, design, and

customer interaction. Systems used for training at Army, Air Force, and Nuclear Power Plants.

Search Technology Inc., Atlanta, GA, 3/85 - 12/89, Research Engineer

AI Programmer on DARPA Pilot's Associate program. Integrated Lockheed aircraft flight simulator with real-time AI

systems. Implemented AI-based Agents and Expert Systems on both PCs and Symbolics LISP Workstations. Some

of this technology is in use today in Helicopters and the F-22.

Georgia Tech Research Institute, Atlanta, GA 9/80 - 3/85, COOP Engineer

Implemented C/FORTRAN 3-D graphical analysis and real-time programs on VAX/VMS. Built various 6800

microprocessor-based hardware for ongoing GTRI experiments. Supported staff of scientists with original 3-D

graphics library. Helped install and maintain Ga Tech's first campus Internet backbone with NIUs, Routers, and Fiber

Optics.

Education

MSEE, 1990, Atlanta, GA., Georgia Institute of Technology.

Focus on VLSI, Networking and Computer Engineering. Helped develop 2um CMOS Standard Cell libraries.

Performed handcrafted CMOS layouts using MAGIC, ran simulation (RTL and SPICE) and place & route to

produce MOSIS Chips. Developed several back-end software utilities used at Ga Tech's Fab such as CIF to PG

utilities for ongoing Georgia Tech Microelectronics Research Center projects.

BEE, 1985, Atlanta, GA, Georgia Institute of Technology.

S kills

Hardware: ASIC and FPGA design using Verilog, Synopsys Design Compiler, SoC Co-Simulation, Verisity

Specman, ATPG, and various FPGA tools and also familiar with physical flow. Microprocessor-based design with

68HC11, PIC, X86, 68xxx. Board-level design with data acquisition, displays, sensors, etc. Use of lab instruments

including Emulators, Logic Analyzers, Scopes, etc. Especially skilled in blending together hardware and software

within a system and in debugging complex systems.

Software: Fluent in C/C++, Verilog, Visual Basic, and Assemblers. Experienced in Real-time/Embedded programming

including Cross-compilers, RTOSs, and debuggers. Experienced in programming GUIs, Databases and drivers. UNIX

skills including GNU, CSH, Perl, AWK/SED, etc. Knowledgeable in Communications Protocols and Networking.

Able to define original APIs, Specifications and Test Plans.

Management: A ble to lead engineering teams. Active in proposals, technical writing, and presentations.

Various: Internet fluent, music training, enjoy travel, have held SECRET clearances.

Additional Courses

Embedded Systems Conference courses, San Francisco, CA, 2002

Cadence Design Planner Training, Atlanta, GA, 1998

Viewlogic Sunrise Test Users Course, Orlando, FL, 1997

Microsoft Internationalization Workshop, Atlanta, GA, 1993

Symbolics LISP Machine Users Course, Cambridge, MA, 1987

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