Post Job Free
Sign in

Manager Design

Location:
Boston, MA
Posted:
March 06, 2013

Contact this candidate

Resume:

Date: August *th, ****

Resume: Frank Rossi

*** ******** ***

Burlington, Vermont 05408

Phone 802-***-****

email ******@*****************.***

WORK HISTORY

IBM Burlington Vt o ASIC Noise Analysis Eng 1/11 to 06/12

IBM Burlington Vt o Application Eng SerDes 2/05 to 12/08

IBM Burlington Vt o Retired from IBM 10/00 to 6/03

IBM Burlington VT o DIMM Design/Applications 4/98 to 9/00

IBM Burlington VT o Graphics Card Design 8/97 to 4/98

IBM Burlington VT o Dram/Vram Applications 5/90 to 8/97

IBM Burlington VT o Manager VLSI Card Design 4/86 to 5/90

IBM Burlington VT o Program Office Manager 12/84 to 4/86

Int'l Assignment Germany o Memory Chip Development 10/82 to 12/84

IBM Burlington VT o Managed 288K DRAM Device 10/78 to 10/82

Int'l Assignment Germany o Memory Card Development 10/76 to 10/78

IBM Burlington VT o VLSI Memory Design 6/71 to 10/76

IBM Poughkeepsie NY o Bi-Polar CFET Design 6/64 to 6/71

RCA Somerville NJ o Bi-polar Design/Test 2/59 to 6/64

Military USA Signal Corp o Electronics Instructor 1/57 to 1/59

TECHNICAL VITALITY: Proven ability to direct VSLI products from design to

manufacture including design, test, analysis and customer quality.

MANAGEMENT

o Manager of High Dense Memory array cards 4/86 to 5/90

o Manager of Product Program Office-Marketing Business 12/84 to 4/86

o Manager of High Density DRAM chip design team 10/87 to 10/82

EDUCATION

o Marist College, Poughkeepsie, NY BS Math June 1970

o DeVry Technical Institute, Chicago, ILL Electronics May 1955

o High School Academic June 1953

EXPERIENCE

o Directed and coordinated world's first 256K DRAM chip into full production

o Memory interface between card/system organizations

o In-depth knowledge of VLSI hardware debug and characterization.

o International technical Leadership roles between VLSI design/mfg.

o VLSI Product applications to KEY customer accounts

o High Speed SerDes 10Gbit ASIC Products/Package Design + HSPICE Analysis

o Expert using IBM Analysis tools to ensure ASIC products meet Customer Desing

Noise Specifications.

CREATIVITY

o Patent - Modular photonic wave guide distribution system

o Patent - Digital Storage

o IBM Division Award - Management/Technical Contribution to VLSI

o Invention Achievement Award

o Patent - High Speed ASIC SerDes Wire Bond Package

PUBLICATIONS

o Advanced Multi Chip Memory Interconnections/Nepcon West Conf Feb 1987

o 512K-bit FET Memory Module/Eurcon 80 Conf in Stuttgart Ger. March 1984

o 288K-bit DRAM - A designers viewpoint/Midcon 82/Dallas Tx April 1982

MARTIAL STATUS

Married/Four Children/Fifteen Grand Children

Date: August 8th, 2012

Resume: Frank Rossi

142 Pleasant Ave

Burlington, Vermont 05408

Phone 802-***-****

email ******@*****************.***

WORK HISTORY

IBM Burlington Vt o ASIC Noise Analysis Eng 1/11 to 06/12

IBM Burlington Vt o Application Eng SerDes 2/05 to 12/08

IBM Burlington Vt o Retired from IBM 10/00 to 6/03

IBM Burlington VT o DIMM Design/Applications 4/98 to 9/00

IBM Burlington VT o Graphics Card Design 8/97 to 4/98

IBM Burlington VT o Dram/Vram Applications 5/90 to 8/97

IBM Burlington VT o Manager VLSI Card Design 4/86 to 5/90

IBM Burlington VT o Program Office Manager 12/84 to 4/86

Int'l Assignment Germany o Memory Chip Development 10/82 to 12/84

IBM Burlington VT o Managed 288K DRAM Device 10/78 to 10/82

Int'l Assignment Germany o Memory Card Development 10/76 to 10/78

IBM Burlington VT o VLSI Memory Design 6/71 to 10/76

IBM Poughkeepsie NY o Bi-Polar CFET Design 6/64 to 6/71

RCA Somerville NJ o Bi-polar Design/Test 2/59 to 6/64

Military USA Signal Corp o Electronics Instructor 1/57 to 1/59

TECHNICAL VITALITY: Proven ability to direct VSLI products from design to

manufacture including design, test, analysis and customer quality.

MANAGEMENT

o Manager of High Dense Memory array cards 4/86 to 5/90

o Manager of Product Program Office-Marketing Business 12/84 to 4/86

o Manager of High Density DRAM chip design team 10/87 to 10/82

EDUCATION

o Marist College, Poughkeepsie, NY BS Math June 1970

o DeVry Technical Institute, Chicago, ILL Electronics May 1955

o High School Academic June 1953

EXPERIENCE

o Directed and coordinated world's first 256K DRAM chip into full production

o Memory interface between card/system organizations

o In-depth knowledge of VLSI hardware debug and characterization.

o International technical Leadership roles between VLSI design/mfg.

o VLSI Product applications to KEY customer accounts

o High Speed SerDes 10Gbit ASIC Products/Package Design + HSPICE Analysis

o Expert using IBM Analysis tools to ensure ASIC products meet Customer Desing

Noise Specifications.

CREATIVITY

o Patent - Modular photonic wave guide distribution system

o Patent - Digital Storage

o IBM Division Award - Management/Technical Contribution to VLSI

o Invention Achievement Award

o Patent - High Speed ASIC SerDes Wire Bond Package

PUBLICATIONS

o Advanced Multi Chip Memory Interconnections/Nepcon West Conf Feb 1987

o 512K-bit FET Memory Module/Eurcon 80 Conf in Stuttgart Ger. March 1984

o 288K-bit DRAM - A designers viewpoint/Midcon 82/Dallas Tx April 1982

MARTIAL STATUS

Married/Four Children/Fifteen Grand Children

Date: August 8th, 2012

Resume: Frank Rossi

142 Pleasant Ave

Burlington, Vermont 05408

Phone 802-***-****

email ******@*****************.***

WORK HISTORY

IBM Burlington Vt o ASIC Noise Analysis Eng 1/11 to 06/12

IBM Burlington Vt o Application Eng SerDes 2/05 to 12/08

IBM Burlington Vt o Retired from IBM 10/00 to 6/03

IBM Burlington VT o DIMM Design/Applications 4/98 to 9/00

IBM Burlington VT o Graphics Card Design 8/97 to 4/98

IBM Burlington VT o Dram/Vram Applications 5/90 to 8/97

IBM Burlington VT o Manager VLSI Card Design 4/86 to 5/90

IBM Burlington VT o Program Office Manager 12/84 to 4/86

Int'l Assignment Germany o Memory Chip Development 10/82 to 12/84

IBM Burlington VT o Managed 288K DRAM Device 10/78 to 10/82

Int'l Assignment Germany o Memory Card Development 10/76 to 10/78

IBM Burlington VT o VLSI Memory Design 6/71 to 10/76

IBM Poughkeepsie NY o Bi-Polar CFET Design 6/64 to 6/71

RCA Somerville NJ o Bi-polar Design/Test 2/59 to 6/64

Military USA Signal Corp o Electronics Instructor 1/57 to 1/59

TECHNICAL VITALITY: Proven ability to direct VSLI products from design to

manufacture including design, test, analysis and customer quality.

MANAGEMENT

o Manager of High Dense Memory array cards 4/86 to 5/90

o Manager of Product Program Office-Marketing Business 12/84 to 4/86

o Manager of High Density DRAM chip design team 10/87 to 10/82

EDUCATION

o Marist College, Poughkeepsie, NY BS Math June 1970

o DeVry Technical Institute, Chicago, ILL Electronics May 1955

o High School Academic June 1953

EXPERIENCE

o Directed and coordinated world's first 256K DRAM chip into full production

o Memory interface between card/system organizations

o In-depth knowledge of VLSI hardware debug and characterization.

o International technical Leadership roles between VLSI design/mfg.

o VLSI Product applications to KEY customer accounts

o High Speed SerDes 10Gbit ASIC Products/Package Design + HSPICE Analysis

o Expert using IBM Analysis tools to ensure ASIC products meet Customer Desing

Noise Specifications.

CREATIVITY

o Patent - Modular photonic wave guide distribution system

o Patent - Digital Storage

o IBM Division Award - Management/Technical Contribution to VLSI

o Invention Achievement Award

o Patent - High Speed ASIC SerDes Wire Bond Package

PUBLICATIONS

o Advanced Multi Chip Memory Interconnections/Nepcon West Conf Feb 1987

o 512K-bit FET Memory Module/Eurcon 80 Conf in Stuttgart Ger. March 1984

o 288K-bit DRAM - A designers viewpoint/Midcon 82/Dallas Tx April 1982

MARTIAL STATUS

Married/Four Children/Fifteen Grand Children



Contact this candidate