Design Engineer

C-DAC's Advanced Computing Training School

RESUME

T.SATISH KUMAR

CELL : +91-890*******

E-MAIL :

******.****@*****.***

Career Objective

Seeking a challenging career in the field of VLSI towards

organizational success where I can use my strong analytical and

interpersonal skills. All the way engaging in new challenges and learning

experiences.

Current position

> Currently working as a "VLSI Design Engineer" at "MIMOWAVES

Technologies" as an intern since 4 months.

> Design and implementation of WLAN(802.11 b/n) Protocol using VHDL

and Verilog languages, Xilinx ISE 14.2, FPGA(Xilinx, Zynq)

Academic

C-DAC's ADVANCED COMPUTING TRAINING SCHOOL Nagpur, MH, India

PG-Diploma in VLSI DESIGN

2012(Feb-Aug)

75.30%

CM ENGINEERING COLLEGE Hyderabad, AP,

India

Bachelor of ELECTRONICS AND COMMUNICATION 2007 - 2011

Engineering in

79.10%

SANDEEPANI JUNIOR COLLEGE Kamareddy, India

INTERMEDIATE 2005-2007

94.10%

SRI CHAITANYA VIDYA NIKHETAN HIGH SCHOOL Bhiknoor, India

MATRICULATION 2004-2005

85.00%

Technical

Skills

Processor : Atmel,AVR

FPGA : Xilinx, Altera Cyclone-II,

Zynq(XC7020)

Languages : C, Verilog, VHDL, Embedded C

Programing

Development : AVR studios-5,

Tools QuartusII-8.1,Xilinx-ISE 14.2

C-DAC's Advanced Computing Training School

RESUME

Duratio

Title n In Platform Description

Months Used

LOW POWER Globally Asynchronous Locally

GLOBALLY Synchronous(GALS) is a relatively new

ASYNCHRONOUS VLSI system design methodology that

LOCAL promises to combine the advantages of

SYNCHRONOUS both synchronous and asynchronous

(GALS) designs. Through the proposed design,

DESIGN OF 32-BIT 3 VHDL we Designed and implemented 32-bit

MICROPROCESSOR microprocessor using VHDL and

USING VHDL comparison are made in speed and power

calculations of both synchronous and

GALS design.

IMPROVEMENT OF "Orthogonal code" is one of the codes

that can detect errors and correct

"ORTHOGONAL-CODE corrupted data. An n-bit orthogonal

" CONVOLUTION 1 Verilog code has n/2 0's and n/2 1's.The main

CAPABILITIES objective in this project is to

USING FPGA enhance the error control capabilities

IMPLEMENTATION of orthogonal codes by means of Field

Programmable Gate Array (FPGA)

implementation.

A temperature control system, to

AUTOMATIC adjust the ambient air temperature in

TEPERATURE industries. It uses LM 35 and LCD as

CONTROLLER USING 2 EMBEDDED- the user interface to ATMAGA 16

C microcontroller to configure and

"ATMEGA-16" control the system. It also has custom

MICROCONTROLLER hardware and software developed for

the specialized applications.

. Low-power CMOS design

. Static-Timing analysis

C-DAC's Advanced Computing Training School

RESUME

Extra-curricular Activities/Achievements

. Organized National Level Technical Symposium in our college.

. Won second-prize in Ball-Badminton championship at JNTUH Zonal level

competition.

. Won first prize in MINI-PROJECT exhibition held in our college.

. Participated in technical paper presentation competition in various

colleges.

. Member in IETE (Institution of Electronics and Telecommunication

Engineers).

Personal Information

Hobbies:

. Playing Ball-badminton, cricket.

. Reading books

Personal Profile:

Date of : 25th February,

Birth 1990.

Passport No. : J8961942

Passport :

Validity 14-10-2021

Declaration

I hereby declare that the above-mentioned information is correct up

to my knowledge and I bear the responsibility for the correctness of the

above-mentioned particulars.

Place: Bangalore

Date:

Yours Sincerely

SATISH KUMAR.T

[pic]

[pic]

Area of interest

.

Academic Projects:

Contact this candidate