Sr Manager, Director

STEVEN M. CZAPSKI

Cell-512-***-**** http://www.linkedin.com/in/steveczapski ********@*********.***

PROFESSIONAL SUMMARY

Experienced Leader in Quality& Reliability Management, Product Management and Global Operations; offering a solid background in new product development, corporate quality and high volume manufacturing in the High Tech and Start-up Environments. Able to develop and execute business strategies for new products working with global cross functional teams including sales, marketing, design and finance; experienced working with customers, manufactures and vendors to solve problems through the product life cycle; Core competencies include:

Change Management Six Sigma Quality Lean Deployment

Product Reliability Product Certification Product Characterization

Design Verification Design For X Strategies Technology Development

Federal & State Regulations Global Product Regulations Product Development

Cost Reduction Strategies Customer Relations Subcontractor Negotiations

Global Multi Site Management Supply Chain Organizational Management

Program Management Project Management ISO Certifications

EMPLOYMENT HISTORY

ADVANCED MICRO DEVICES (AMD) – Austin, Texas 2012 - Present

Sr. Program Manager Corporate Quality

Develop business processes and procedures for constant improvement to quality, cost and execution of new product development and market introduction, working with customers for product requirements and specification to design products that meet market expectations

• Developed new product Initial Production sign-off policy to insure quality metrics are met per customer requirements

• Managed Customer Critical Situation for driver software issue to keep customer manufacturing line up and running

• Approved Richland Product Laptop reliability testing to meet customer commits by updating end product usage model for the required FIT rate

BAYCO PRODUCTS INC. – Wylie, Texas 2010 - 2012

Director Product Management, Manufacturing and Corporate Quality

Directed marketing research, product development and design, engineering, manufacturing, corporate quality and China operations

• Set up Burn-In activities and factory outgoing 100% inspection allowing for shipping direct ship F.O.B. China factories

• Passed QAN/QAR site audit to maintain ATEX and IECEx Intrinsically Safe certification for LED products at US assembly site

• Worked with MSHA for mining safety approval of first IS lighting product for industrial markets

• Converting all LED products to RoHS compliance for European sales expanding sales regions

• Initiated and improved factory quality procedures to eliminate 100% incoming inspection at US distribution center

• Achieved IECEx and ATEX certifications on four Intrinsically Safe LED products expanding sales to Europe and Australia

• Contracted 5 new manufacturing sites for the development and production of new LED line of products

• Performed in-depth market analysis to baseline Intrinsically Safe, Public Safety, Industrial and Consumer LED lighting product lines

• Launched 8 new products into newly assigned factories hitting a 9 months product development cycle

• Moved all UL and FM listings to ETL for cost savings of 120K dollars per year centralizing compliance certifications

FREESCALE SEMICONDUCTOR – Austin, Texas 2005 - 2010

Design and Development Manager – 2009 to 2010

Managed a multi-functional global organization of engineers responsible for semiconductor package design and assembly for the introduction of new products into Medical, Automotive, Industrial, and Consumer markets; responsible for technology development, hardware design, electrical and thermal modeling, manufacturing, business unit and customer support

• Exercised Lean Fundamentals to achieve 20% designer time savings from 2009 baseline resulting in a decreased backlog of Document Action Request and eliminating the need for more resources

• Initiated Lean fundamentals; Document Action Request rework rate down from 280% to 25%

• Delivered 241 designs with better than 98% on time delivery and 0% error rate

• Established common electrical modeling tools across all business groups, reduced cost, standardized analysis and training

• Extended BPGA design capability to off shore China design house to free up U.S. resources for complicated co-designs

• Electrically simulated and adjusted 100% of NPI High Performance substrate designs to meet electrical constraints

Global Engineering and Design Manager – 2007 to 2009

Managed a multi-functional global organization of engineers responsible for semiconductor package design and assembly, new product introduction and manufacturing support delivering products into Medical, Automotive, Industrial and consumer markets; responsible for technology introduction into manufacturing, business unit and customer product support

• Established Product Transfer Methodology with Zero Defect & Safe Launch concept into RCP, LGA Sensors and low-K high performance substrate devices for successful product launch and cost reduction

• Drove root cause analysis for sensor failures at ASE Korea developing stable process for die attach process to meet customer sample date

• Managed process modification to medical sensor device at Amkor Philippines assembly site to meet customer qualification requirements.

• Transferred all CMOS 90 Flip Chip NPI’s from KLM to ASEKH assembly site to establish external manufacturing site

• Completed introduction of BOT, DAF and.4mm sphere projects in TJN China assembly site for technology expansion

• Completed RCP development and initial commercial qualification of 3 NPI’s, RCP Tempe pilot line to qualify new packaging technology for reduced cost and increased design complexity

Product Engineering Manager – 2005 to 2007

Led the Industrial Networking Product Line working with global teams for new product introduction and legacy product support, responsibilities included P&L management, sales and customer support

• Migrated customer from older products to newer more stable revision for better cost, performance and reliability

• Reduced cost of the 7447A by 20%, burn-in elimination, test time reduction, retargeting of process for better distributions

• Limited requirements for engineering test time needed for Vegas to prioritize Apollo 8 to meet customer commits

• Formed cross functional technology team to introduce new bump technology to internal manufacturing

• Evaluated and qualified bump sub-contractor, moved product line to increase device reliability and customer satisfaction

• Worked with Cisco R&QA to provide confidence in A7 C4 bump reliability

• Removed FLT from A7PM assembly flow saving 120k dollars per year

• Analyzed data from test to implement a solution for WOT (Wide Open Throttle A7) load board modification

CONSULTING – Austin, Texas 2001 - 2005

CMOS Semiconductor Technology, Engineering, Operations and Quality

Worked for start-ups and privately held semiconductor design companies to establish relationships with global contract manufacturers for the purpose of product development and introduction into high volume manufacturing

• Established base line costs for product manufacturing including engineering and production builds, test development and product qualification

• Qualified subcontractor factories for high volume manufacturing

• Obtained intellectual property, technology information and negotiated contract agreements for cost and product delivery with subcontractors and suppliers

• Analyzed design requirements for best product development, overall cost and manufacturing fit

D2AUDIO CORPORATION – Austin, Texas

Manager Product Development, Engineering Operations and Corporate Quality – 2002 to 2004

Oversaw new product introductions from concept through design and into high volume manufacturing

• Selected Foundry, Assembly, Test and Analytical facilities to establish business relationships for engineering and production of D2Audio’s Marco Audio DSP Device reducing overall initial costs by 25%

• Worked with Test Spectrum, UTAC and D2Audio Internal Design Team to increase final test yield by 30%.

• Developed a modified device qualification plan using factory provided data to reduce costs and time to product launch

• Worked with marketing and sales for product collateral needed for customer engagements.

• Started the development of the company’s quality system for future ISO certification

• Moved Marco test and final development to UTAC, the offshore testing site, reducing test cost by 15%

• Engaged with several high voltage foundries for SOI and CMOS technologies capable of producing a high voltage device (above 100 volts) for future D2Audio digital amplifier requirements

• Developed plans and engaged with different vendors to produce a System In a Package (SIP) solution to replace the current PCB module power stage

• Worked closely with the mechanical design team to re-design and manufacture the required mechanicals for the X-series Audio Amplifier Modules, reduced NRE and manufacturing costs by over 50%, reduced development time by 3 weeks

CIRRUS LOGIC, INC. – Austin, Texas 1993 - 2001

Director, Foundry Technology and Engineering - 2000 to 2001

Led a global cross functional engineering & business organization responsible for new technology introduction, product development, qualification and new product introduction into high volume manufacturing, working with marketing, sales and product line managers for customer engagement

• Negotiated long and medium term supplier contracts for intellectual property, engineering and production lower costs

• Conducted supplier audits per ISO specifications for approved vendor list status, participated in QBR’s to review and set strategic and tactical goals for each supplier

• Developed worldwide strategies for product development which supported annual revenue of $700 million

• Transferred .25 and .35-micron technology product lines from joint venture foundries into pure play foundries (TSMC, UMC, Hynix, and Chartered) developing strategic relationships while realizing an average cost savings of $600.00 per wafer plus an increase in overall yields

• Qualified CSMC-HJ, a Chinese Foundry, as strategic partner for lower technology devices; thereby developing multiple sources for several technologies and product lines while lowering wafer costs by $350.00

• Established two business groups and one engineering team in Austin, Texas, centralizing corporate functions

Director, Device Physics Operations – 1998 to 2000

Managed Device Physics & Reliability Analysis Laboratories located in Austin, Texas and Fremont, California to provide electrical and physical analysis of sub-micron CMOS integrated circuits for manufacturing, product and customer support.

• Provided device analysis and design modification support for a large portfolio of analog and digital devices including current .25 technology and developmental .18 technology

• Interfaced with customers, design, product test engineering, foundry and assembly groups to solve Design, Yield and EFR issues, process fallout and customer returns

• Communicated on daily bases with a major Japanese customer to solve a 5% field failure rate problem, discovered root cause, and formulated corrective action and final closure

Device Physics/Reliability Laboratory Manager - 1993 to1998

Managed Device Physics & Reliability Analysis Laboratories to provide electrical and physical analysis of sub-micron CMOS integrated circuits supporting global manufacturing, products and customers

• Performed critical analysis and design modifications of new and existing products utilizing E-beam and mechanical probers, digital and analog testers, Focused Ion Beam Systems, SEM, EDS, and chemical facility

• Developed electrical and physical analysis capabilities resulting in improved response time to design, product engineering, and customers for device failure analysis while achieving a failure hit rate of 95% for customer returns

MOTOROLA – Austin, Texas 1989 - 1993

Staff Engineer, Member of the Technical Ladder, Reliability & Quality Department

Managed Device Physics & Reliability Analysis Laboratories to provide electrical and physical analysis of sub-micron CMOS integrated circuits supporting global manufacturing, products and customers

• Performed electrical and physical analysis on customer returns

• Assist design, product, and reliability engineers in fault isolation for troubleshooting and for qualification of new products

• Communicated with design, device, and process engineers for product and process improvement

TEXAS INSTRUMENTS – Lubbock, Texas 1984 - 1989

Reliability & Quality Engineer/Laboratory Supervisor

• Provided technical support to process and product module groups

• Performed process support for development for oxide etch and metal deposition processes

• Prepared and present reports for customer qualification visits

USAF – Bergstrom AFB, Austin, Texas 1980 - 1984

PMEL Technician: Sergeant USAF

• Repaired and calibrated voltage, current and resistance test equipment; time, RF frequency and microwave equipment

• Maintained RF systems used for Aircraft Counter Measures and Tactical Air Navigation

• Trained and evaluate newly assigned personnel

• Performed out-going quality inspection on all equipment

Texas Instruments – Lubbock, Texas 1979 - 1980

Quality/Process Control Technician

• Supervised twelve Quality Control Inspectors for the wafer fabrication area

• Tracked SPC data at each critical process step of the fabrication process

• Performed experiments and analyze data for process improvement

EDUCATION/TRAINING

Texas Tech University – Lubbock, Texas

B.S., Electrical Engineering Technology

Community College of the Air Force – Bergstrom AFB, Austin, Texas

Associate Degree in Electronic System Technology

Over 600 hours of Technical and Managerial Development Courses

PATENTS

“Double Shield for Electron and Ion Beam Columns”

Patent Issued Oct 2nd 2001 Patent # 6,297,512

PUBLICATIONS

“Packaging Design for 77 GHz”

Freescale TEM Tempe Poster Secession 2010

“Analog Circuit Modifications using FIB System”

Schlumberger, IDS User Conference 1995

“Methodology for Auger Depth Profile Analysis of a Specific Sub-Micron Contact from the Backside”

MATS 1992

“Disclosure No. 1050-Plasma Etch I.C. Holder”

Motorola’s Technical Developments, March 1991

“Focused Ion Beam Applications for Design and Product Analysis”

Proceedings of the 17th International Symposium for Testing and Failure Analysis

(ISTFA) November 1991

PROFESSIONAL DEVELOPMENT

Design of Experiments/Taguchi Methods Leading Digital Six Sigma

Lean Logic Lean Value

Reliability Engineering Six Sigma Green/Black Belt Program

Accelerated Life Testing/Failure Mechanisms Six Sigma Foundations

Six Sigma DMAIC Lean Value Stream Mapping

Statistical Process Control I Strategy Simulation for Freescale Managers

Semiconductor Technology Leading Cross-Functional Teams for Freescale Managers

Understanding Semiconductors Supervisor Safety Training

MOS/LSI Integrated Circuits 68000 Microprocessor Training

Device Physics Comparative Methods of Analysis

Managing Within the Law Spectrometer Maintenance and Calibration

Management by Objectives Microwave Measurement and Calibration

Supervision Training Phase I, II and III Precision Measuring Equipment Specialist

Basics of Supervision Sales Methodology Overview for Marketing

Making Great Leaders – Managers Experience Particle Prod. Management Requirements

An Introduction to Project Management PMP Boot Camp and Best Practices

HMM02 - Business Case Development HMM01- Budgeting

Contact this candidate