Engineer Design
Resume:
CAMERON A. JOYNER ********@*****.***
***** **** ******* ***** ******, Colorado 80013
PROFESSIONAL SUMMARY
An experienced engineer who has performed analysis, design and development
of custom complex mixed-technology boards, modules and subsystems that
incorporate DSP, microcontroller, and FPGAs from concept to final delivery
using the latest development platforms. Spacecraft, Aircraft Avionics
subsystems, NASA Shuttle Mission Payload, and the Military Expeditionary
Fighting Vehicles are a few of the End-Items that have the custom
electronics designs.
TECHNICAL SKILLS
H/W Design: DSP, Microcontroller/processors, cPCI, VME, I2C, Ethernet,
1553, FPGA/CPLD, Digital Logic,
Analog, Memories, ADC/DAC, Fiber Optics, Orcad, pSpice, Cadence
S/W Design: C, Assembly, Matlab, VHDL, SW Compiler IDEs, HDL-Designer,
ModelSim, Quartus,
Project, Excel
EMPLOYMENT
BALL CORPORATION
Antenna & Video Technologies, Broomfield, Colorado
November 1994 - April 2011
Senior Engineer (Secret/SSBI Clearances)
? Concepts through to successful final demonstration of a Shipboard Multi-
Channel Interference Canceller. The electronics designs involved custom:
enclosure, backplane, embedded TMS320C6415 DSP on Canceller Modules, custom
interface module for the external COTS radios into the system (via Ethernet
Protocol & SNAP), and Distributed Power Supply Module. Customer funding of
several follow-on contracts as a result of outstanding performance
(including a variation of this product).
? Complete design and development of a Spacecraft Subsystem Solid-State
Data Recorder I/F Module. Design involved multiple RadHard FPGAs for
flexible channel numbers and data bandwidths (32Mbps LVDS data rate to
SSDR). Coded using VHDL, Synplify Pro for synthesis, and Designer software
for Place-n-Route. After the systems integration, the Spacecraft was
successfully deployed.
? Successful completion from design through Acceptance Test and Operational
Fielding of the electronics in a Military Land Vehicle RF Interference
Canceller Subsystem. Power, digital/CPLD, and analog components were
implemented in the design. Project had to overcome several technical
challenges, but was successfully completed on schedule and cost.
? NASA Shuttle Flight (STS-99) design project - the hardware receives FC
commands that electronically streers the phased-array antenna panels and
downlinks RF data, status and telemetry for a radar topography/3D earth-
mapping mission. A Mil-Spec microcontroller and CPLDs were used to
implement the module. Additionally, a second subsystem that corrected for
any boom movement of the extended receive antenna panels was designed,
developed and system integrated. The electronics integrated a Mil-Spec VME
microprocessor board and a custom designed A32/D32 Slave Controller using
CPLDs. Both subsystems used custom chassis, backplanes, and
modules/boards. The radar mission gathered data that has produced
unrivaled 3-D images of the Earth's surface.
? Design and development of the Control Electronics for an Aircraft
Inertial Navigation Antenna-Pointing System using the TI TMS320C50 DSP.
This product proved out Live DirectTV on G3 business aircrafts and
currently resides on the target aircraft.
? Software development and check out of a Servo-Controller Electronics
board which is used in an INMARSAT Land Mobile Communications System. The
system is used in the Middle East to enabling land vehicles with voice/data
communications in remote locations.
Cameron A. Joyner
Page Two
UNITED TECHNOLOGIES CORPORATION
Sikorsky Division, Stratford, Connecticut
March 1992 - March 1994
Senior Hardware Design Engineer (Secret Clearance)
? Design and development of a two-channel RS422-ARINC 429 converter.
Flexible design with selectable ARINC 429 speeds (12.5k & 100k) and 300-
38.4k baud on the RS422 side. The converter was designed using state
machines (CPLDs) and ARINC Bus I/F devices. Menu driven C-language
routines for CRC-16 calculations needed used for ARINC-429 data decoding.
? Research & development project involving systems integration of various
subsystems (Mission Processor, Nav Unit, Comm, Guidance, Sensors, 1553 Bus,
and Custom I/O) into an experimental Blackhawk helicopter to prove out
advanced Artificial Intelligence concepts. Design of several
digital/analog circuits to support this and other related projects.
MARTIN MARIETTA I&CS
Denver, Colorado
June 1984 - May 1991
Hardware Design Engineer (Secret Clearance)
? Design of a VME Slave Controller board with interrupt capabilities and
two resident custom interface circuits designed to communicate with
external hardware. The board resides in a Silicon Graphics host computer
and services the interrupts generated by the two custom interface circuits
via the VME Bus. The VME Bus I/F was designed using EPLDs, and logic
circuits; the two custom interface circuits used EPLDs, digital logic,
FIFOs and RS-422 drivers and receivers.
? Design of an 80186 embedded controller interface to communicate with
upgraded device controllers (disk, mag tape, and plotter) for an existing
NASA computer/device controller configuration. The conceptual and logic
design of the front panel controller hardware, chassis features, and an
asynchronous handshaking protocol for the controllers were defined and
implemented. The 68-pin Intel 80186 microprocessor replaced the Intel
Series IV-I2ICE Development System after completing the PDL/assembly
language microcode, circuit debugging and operational checkout.
EDUCATION
Master of Computer Information System
Graduate Study: Computer Engineering
University of Denver, Denver, Colorado
Bachelor of Science Electronic Engineering Technology
Missouri Institute of Technology, Kansas City, Missouri
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