Engineer Test

Maneesh Sharma

**** ********* *****, ******, **, 75063.

416-***-****, **********@*****.***

Objectives

Lead a team of Test and Product Engineers for new silicon bring up from NPI

to production. Characterization of new silicon at ATE level and establish

correlation with system level test results. Give priority for stable test

program release to OSAT, lower test cost, improve yield and increase

throughput. Work with different vendors for design, fab and testing of

hardware required for production testing.

Qualifications

12+ years of experience as Test and Product engineer for established as

well as new startups. Knowledge of SCAN, JTAG, BIST and SerDes test

techniques. Used Credence Quartet, Verigy 93K and Teradyne Tiger Tester for

debugging and characterization of mixed signal devices with high speed

serdes at packages and wafer level. Worked with different OSAT overseas for

yield improvement and test program bring-up using remote connection.

Experience:

Feb 2007 - Present

Senior Test Engineer, Vixs System Inc, Toronto, Canada.

Reporting directly to Director of Operation, responsibility includes

planning, developing and executing test plan for every device at Vixs.

Devices tested are mixed signal with PCIe, SATA, USB and MoCA testing.

Test platform used includes Credence Quartet and Verigy 93K with dual

testing implemented for the first time at Vixs.

Developed innovative test method, as solution for testing Serdes using

Credence quartet tester. This method includes testing with known Jitter

injection as well as BER test. Very cost effective.

First project at Vixs was to reduce the test cost of existing test program,

40% test time reduction achieved.

Design and work with different vendors for ATE load board, socket and probe

card (Vertical and Cantilever type) development for every project. Recent

project under development is RF device.

Lead small team of product and test engineers to provide efficient and cost

effective test solutions at package and wafer level, without any in-house

tester availability. Provide support to FAE team for data collection, new

test development and give inputs for effective FAE reports to customers.

July 1997 - Nov 2006

Test and Product Engineer, ATI(AMD) Inc, Toronto, Canada.

Developed multiple test programs for production and characterization of

mixed signal devices. Platform used were Credence Duo, Quartet tester,

Agilents's 93K tester, Teradyne's Tiger platform.

Lead team for test program conversion from Credence platform to Agilent's

93K and or Teradyne's tiger tester. Did co-relation, prepared reports and

successful NPI to production release to OSAT.

Lead efforts for recovering parts from reject bins on annual basis. This

included driving discussion with sales and design team for finding

alternatives to parts that were partially good.

Worked closely with FAE team to drive ATE test program upgrade on

continuous basis. Monitor customer reported dppm rate and drive in-house QC

process for lowering dppm on fixed time basis.

Education

June 1989: Punjab University, Chandigarh, India

Bachelor of Electrical Engineering

July 1995 - May 1997 Concordia University, Montreal, Canada

Master of Electrical and Computer Engineering

Visa Status: Canadian Citizenship.

References - Available on request

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