| Resume alert | Resumes 11 - 20 of 810 |
Control System Aircraft
Vasant Nagar, Karnataka, India
... Secondary Education Board Shree Manjunatha Girls High School 2011 89% • Operating system : Windows Xp,7,8,10 • Programming language: Basics of C, MAT LAB, Verilog • Understanding & Knowledge of tools like MATLAB Simulink – Basic, CADENCE, SYNOPSYS. ... - 2021 Jul 12
... Secondary Education Board Shree Manjunatha Girls High School 2011 89% • Operating system : Windows Xp,7,8,10 • Programming language: Basics of C, MAT LAB, Verilog • Understanding & Knowledge of tools like MATLAB Simulink – Basic, CADENCE, SYNOPSYS. ... - 2021 Jul 12
Spartan Project
Vasant Nagar, Karnataka, India
... 3)FPGA implementation of image enhancement using Verilog HDL Description: Implementation of 4 operations like contrast,threshold, brightness,invert by developing code in XILINX 14.7 and matlab code to get desired output and later implemented on ... - 2021 Jun 29
... 3)FPGA implementation of image enhancement using Verilog HDL Description: Implementation of 4 operations like contrast,threshold, brightness,invert by developing code in XILINX 14.7 and matlab code to get desired output and later implemented on ... - 2021 Jun 29
Cgpa Ece
Bangalore, Karnataka, India
... Examination Board 2015 87.2 SKILLS PROFILE: • Digital Electronics • C Programming Language • C++ • Verilog HDL • MATLAB • MS Office • VLSI • Soldering Components on PCB MINI PROJECTS: • Developed Verilog code for optimised reversable shift register. ... - 2021 May 28
... Examination Board 2015 87.2 SKILLS PROFILE: • Digital Electronics • C Programming Language • C++ • Verilog HDL • MATLAB • MS Office • VLSI • Soldering Components on PCB MINI PROJECTS: • Developed Verilog code for optimised reversable shift register. ... - 2021 May 28
Dist Cgpa
Vasant Nagar, Karnataka, India
... Protocols :I2C,UART Extracurricular Activities Participated in VLSI design using verilog HDL workshop in the year 2018. Completed 4 weeks internship on the Embedded C at Sai Tektronix, Banglore. Certification Embedded systems: Completed ... - 2021 May 27
... Protocols :I2C,UART Extracurricular Activities Participated in VLSI design using verilog HDL workshop in the year 2018. Completed 4 weeks internship on the Embedded C at Sai Tektronix, Banglore. Certification Embedded systems: Completed ... - 2021 May 27
C++, C, Electronics
Bangalore, Karnataka, India
... • VLSI design using Verilog hdl webinar certificate. • Certificate of participation for national level quiz on Electrical and Electronic measurements. INTERNSHIP • Virtual Internship on Machine Learning and AI at Pincore Technologies India Pvt. Ltd. ... - 2021 May 25
... • VLSI design using Verilog hdl webinar certificate. • Certificate of participation for national level quiz on Electrical and Electronic measurements. INTERNSHIP • Virtual Internship on Machine Learning and AI at Pincore Technologies India Pvt. Ltd. ... - 2021 May 25
Trainee Internship
Vasant Nagar, Karnataka, India
... St.Mary’s High School, Arsikere Karnataka Secondary Education Examination Board 2015 80 Technical Skills: • Programming Languages : Basics of C,C++,Verilog and Python Achievements: • Attend VLSI Design Using Verilog HDL-Webinar in Maven Silicon. ... - 2021 May 25
... St.Mary’s High School, Arsikere Karnataka Secondary Education Examination Board 2015 80 Technical Skills: • Programming Languages : Basics of C,C++,Verilog and Python Achievements: • Attend VLSI Design Using Verilog HDL-Webinar in Maven Silicon. ... - 2021 May 25
Mysore Collage
Vasant Nagar, Karnataka, India
... Swamy Vivekananda pu collage mysore State Board 2017 72% SSLC – Little angle school hutti gold mines State Board 2015 80% AREAS OF INTERESTS •Programming in C, C++, Core java CERTIFICATIONS: •VLSI Design using Verilog HDL-Webinar by MAVEN silicon. ... - 2021 May 24
... Swamy Vivekananda pu collage mysore State Board 2017 72% SSLC – Little angle school hutti gold mines State Board 2015 80% AREAS OF INTERESTS •Programming in C, C++, Core java CERTIFICATIONS: •VLSI Design using Verilog HDL-Webinar by MAVEN silicon. ... - 2021 May 24
Mysore Project
Vasant Nagar, Karnataka, India
... 74% S.S.L.C Dr.Radhakrishnan School,Hosapete Karnataka State Board 2015 84% TECHNICAL SKILLS: Basics of C, Java and Python Verilog, VHDL KEY STRENGTHS: Self-Learner, Ability to motivate and work with team Ability to Communicate well and adopt myself ... - 2021 May 24
... 74% S.S.L.C Dr.Radhakrishnan School,Hosapete Karnataka State Board 2015 84% TECHNICAL SKILLS: Basics of C, Java and Python Verilog, VHDL KEY STRENGTHS: Self-Learner, Ability to motivate and work with team Ability to Communicate well and adopt myself ... - 2021 May 24
Mysore Internship
Vasant Nagar, Karnataka, India
... TECHNICAL SKILLS: Programming languages: C,C++,Python, Core java, Verilog, VHDL Web technologies: HTML Microsof technologies: Azure CO - CURRICULAR ACTIVITIES : I was partcipated in “2nd south India project exhibiton” at Tiptur. Attended 4th Natonal ... - 2021 May 24
... TECHNICAL SKILLS: Programming languages: C,C++,Python, Core java, Verilog, VHDL Web technologies: HTML Microsof technologies: Azure CO - CURRICULAR ACTIVITIES : I was partcipated in “2nd south India project exhibiton” at Tiptur. Attended 4th Natonal ... - 2021 May 24
Internship Agricultural
Vasant Nagar, Karnataka, India
... CERTIFICATIONS: • VLSI Design using Verilog HDL-Webinar by MAVEN silicon • 2 nd South India Project Exhibition (SIPE-2K19) • Certificate of participation for online webinar on “Artifical intelligence for autonomous driving “by agimus technologies in ... - 2021 May 24
... CERTIFICATIONS: • VLSI Design using Verilog HDL-Webinar by MAVEN silicon • 2 nd South India Project Exhibition (SIPE-2K19) • Certificate of participation for online webinar on “Artifical intelligence for autonomous driving “by agimus technologies in ... - 2021 May 24