| Resume alert | Resumes 41 - 50 of 56 |
Project Engineering
Pune, MH, India
... EXPERIENCE: Experience of 8 months in LSI R&D, Pune on the project FPGA Emulations as an Intern. Following are Skills gained • TCL Scripting for tool automation. • Synthesizing of RTL Design with Precision, Vivado, Synplify tools. • Implementation ... - 2014 Jun 26
... EXPERIENCE: Experience of 8 months in LSI R&D, Pune on the project FPGA Emulations as an Intern. Following are Skills gained • TCL Scripting for tool automation. • Synthesizing of RTL Design with Precision, Vivado, Synplify tools. • Implementation ... - 2014 Jun 26
VLSI
Pune, MH, India
... > FPGA : Vertex-4. > Languages : C, core java. ACADEMIC PROJECT (PG-DVLSI): TITLE: FPGA implementation of Transmission Control Protocol PLATFORM: Xilinx 13.1, Modelsim, Vertex-4 FPGA, VHDL Language. DESCRIPTION: TCP is a connection-oriented, end-to ... - 2014 May 12
... > FPGA : Vertex-4. > Languages : C, core java. ACADEMIC PROJECT (PG-DVLSI): TITLE: FPGA implementation of Transmission Control Protocol PLATFORM: Xilinx 13.1, Modelsim, Vertex-4 FPGA, VHDL Language. DESCRIPTION: TCP is a connection-oriented, end-to ... - 2014 May 12
Training Project
Pune, MH, India
... Xilinx FPGA programing. . Skill to work with spirit as a part of team as well as independently. . Ability to shape in with new environment. > One month training course of embedded system design using AVR in Embetronics training institute in pune. > ... - 2013 Aug 19
... Xilinx FPGA programing. . Skill to work with spirit as a part of team as well as independently. . Ability to shape in with new environment. > One month training course of embedded system design using AVR in Embetronics training institute in pune. > ... - 2013 Aug 19
Project Objective
Pune, MH, India
... I studied a bout design and simulation of digital logic circuits in FPGA using QUARTUS -II software. With three member team, made major project “Fire Fighting Robot”, using microcontroller that detects fire and raises alarm, moves to the fire spot ... - 2013 Jun 24
... I studied a bout design and simulation of digital logic circuits in FPGA using QUARTUS -II software. With three member team, made major project “Fire Fighting Robot”, using microcontroller that detects fire and raises alarm, moves to the fire spot ... - 2013 Jun 24
harshi_gupta_m.tech_VLSI_design
Pune, MH, 411038, India
... Dexterous at RTL coding using Verilog and Test benches in System Verilog and possess the domain of ASIC, FPGA design flow and Digital Design methodologies, PLL, MOS physics, op- amp. . Possess sound Analytical, Quantitative Research and Problem ... - 2013 Jun 24
... Dexterous at RTL coding using Verilog and Test benches in System Verilog and possess the domain of ASIC, FPGA design flow and Digital Design methodologies, PLL, MOS physics, op- amp. . Possess sound Analytical, Quantitative Research and Problem ... - 2013 Jun 24
Design Project
Pune, MH, India
... EDUCATIONAL QUALIFICATION Technical Knowledge Good understanding of the ASIC and FPGA design flow Experience in writing RTL models in Verilog HDL and Testbenches in SystemVerilog Experience in using industry standard EDA tools for the front-end ... - 2013 Apr 26
... EDUCATIONAL QUALIFICATION Technical Knowledge Good understanding of the ASIC and FPGA design flow Experience in writing RTL models in Verilog HDL and Testbenches in SystemVerilog Experience in using industry standard EDA tools for the front-end ... - 2013 Apr 26
M.TECH in VLSI Design
Pune, MH, 411034, India
... MTECH Project- Implementation of Multi-mode OFDM transmitter using Partial- Reconfiguration on FPGA Platform. . Team Size-One. . Role- Programmer. . Programming Language- VHDL. . Tools and Language- Xilinx12.3ise-ProjectNavigator, Xilinx12.3ise- ... - 2013 Jan 08
... MTECH Project- Implementation of Multi-mode OFDM transmitter using Partial- Reconfiguration on FPGA Platform. . Team Size-One. . Role- Programmer. . Programming Language- VHDL. . Tools and Language- Xilinx12.3ise-ProjectNavigator, Xilinx12.3ise- ... - 2013 Jan 08
Design Engineer
Pune, MH, 411021, India
... Professional Summary of Major Experience: Executive Summary: Highly Committed, Proactive and Innovative Design Engineer with in depth knowledge of FPGA & Large Scale Digital Mixed Signal Hardware & Circuit Design, implementation and system ... - 2012 Nov 20
... Professional Summary of Major Experience: Executive Summary: Highly Committed, Proactive and Innovative Design Engineer with in depth knowledge of FPGA & Large Scale Digital Mixed Signal Hardware & Circuit Design, implementation and system ... - 2012 Nov 20
Project Training
Pune, MH, India
... We implemented our design on Virtex-4 (FPGA). PLATFORM:- Verilog B.TECH PROJECT: ● “DTMF Based Remote Control” using mobile phone. DESCRIPTION:- Controlling & switching of a vehicle through mobile phone. SKILLS Languages : System Verilog, VHDL, ... - 2012 Aug 20
... We implemented our design on Virtex-4 (FPGA). PLATFORM:- Verilog B.TECH PROJECT: ● “DTMF Based Remote Control” using mobile phone. DESCRIPTION:- Controlling & switching of a vehicle through mobile phone. SKILLS Languages : System Verilog, VHDL, ... - 2012 Aug 20
Project Design
Pune, MH, 411034, India
... Instrumentation Engineering Pune University 2009 66.96 XIIth Maharashtra Board 2005 65.33 Xth Maharashtra Board 2003 70.40 MTECH Final Year project : Project Name Implementation of Multi-mode OFDM transmitter using partial reconfiguration on FPGA ... - 2012 Jun 19
... Instrumentation Engineering Pune University 2009 66.96 XIIth Maharashtra Board 2005 65.33 Xth Maharashtra Board 2003 70.40 MTECH Final Year project : Project Name Implementation of Multi-mode OFDM transmitter using partial reconfiguration on FPGA ... - 2012 Jun 19