| Resume alert | Resumes 21 - 30 of 56 |
Electronics and telecommunications
Pune, MH, India
... CAR SECURITY SYSTEM USING FPGA Keyless car entry through face detection using FPGA MATLAB, VHDL 3 2012-2013 . PERSONAL PROFILE: Name : Rohini Ramchandra Joshi Father’s Name : Ramchandra Pandharinath Joshi Sex : Female Marital Status : Married. ... - 2017 Mar 08
... CAR SECURITY SYSTEM USING FPGA Keyless car entry through face detection using FPGA MATLAB, VHDL 3 2012-2013 . PERSONAL PROFILE: Name : Rohini Ramchandra Joshi Father’s Name : Ramchandra Pandharinath Joshi Sex : Female Marital Status : Married. ... - 2017 Mar 08
Software Engineer Project
Pune, MH, India
... Description : The main objective is to compare parameters of urdhava and nikhilam multiplier And their implementation on FPGA. The calculated power of urdhava multiplier and nikhilam multiplier are same but urdhava multiplier has less delay as ... - 2016 Aug 31
... Description : The main objective is to compare parameters of urdhava and nikhilam multiplier And their implementation on FPGA. The calculated power of urdhava multiplier and nikhilam multiplier are same but urdhava multiplier has less delay as ... - 2016 Aug 31
Project Management
Pune, MH, India
... SSC 2008-09 82.15% ACADEMIC PROJECT DETAILS: 1.Mega Project: FPGA Implementation of Digital PLL for Maintaining Speed of DC Motor. Description: DPLL-Digital Phase Locked Loop a closed-loop feedback control system that maintains a generated signal in ... - 2016 May 22
... SSC 2008-09 82.15% ACADEMIC PROJECT DETAILS: 1.Mega Project: FPGA Implementation of Digital PLL for Maintaining Speed of DC Motor. Description: DPLL-Digital Phase Locked Loop a closed-loop feedback control system that maintains a generated signal in ... - 2016 May 22
Business Analyst
Pune, MH, 411001, India
... •Technology/Platform – VHDL, FPGA,Microprocessor. •This project presents structural design and functional characteristics of general purpose RISC processor. The implementation of processor is based on study and evaluation of variety of instruction ... - 2016 Feb 02
... •Technology/Platform – VHDL, FPGA,Microprocessor. •This project presents structural design and functional characteristics of general purpose RISC processor. The implementation of processor is based on study and evaluation of variety of instruction ... - 2016 Feb 02
Seeking career in VLSI domain. Good in Verilog, Cadence, FPGA
Pune, MH, India
... Academic Projects Overview FPGA Based ECG Signal Processing Duration: Aug 2014 – July 2015, M. Tech Final Year Team Size: Individual Contribution Role Played: Design, Test-bench and Implementation Skills Used: Verilog, Questasim, Matlab, Xilinxs ISE ... - 2015 Dec 08
... Academic Projects Overview FPGA Based ECG Signal Processing Duration: Aug 2014 – July 2015, M. Tech Final Year Team Size: Individual Contribution Role Played: Design, Test-bench and Implementation Skills Used: Verilog, Questasim, Matlab, Xilinxs ISE ... - 2015 Dec 08
ASIC verification: VHDL, Verilog
Pune, MH, India
... PROJECT: FPGA BASED ULTRASOUND SYSTEM FOR UNDERWATER COMMUNICATION The objective of the project is to design an underwater communication modem which is portable. For that purpose I am using the FPGA board in this. Also I have used the ASK modulation ... - 2015 Nov 21
... PROJECT: FPGA BASED ULTRASOUND SYSTEM FOR UNDERWATER COMMUNICATION The objective of the project is to design an underwater communication modem which is portable. For that purpose I am using the FPGA board in this. Also I have used the ASK modulation ... - 2015 Nov 21
Project Design
Pune, MH, India
... project: ‘FPGA and ARM Board Design for Muon Particle Detection and Processing’ (T.I.F.R. Ooty). In this project our aim is to design and implement muon particle counter. Design and manufacturing of custom FPGA board. Design and manufacturing of ... - 2015 Oct 16
... project: ‘FPGA and ARM Board Design for Muon Particle Detection and Processing’ (T.I.F.R. Ooty). In this project our aim is to design and implement muon particle counter. Design and manufacturing of custom FPGA board. Design and manufacturing of ... - 2015 Oct 16
Project Design
Pune, MH, India
... Platform Tools Cadence Virtuoso Design Suite Microcontroller 8051, AVR 8515 Microprocessor 8085, 8086, ADSP 2181 Design Kits FPGA Spartan III Starter Board,FPGA Spartan III-E kit, AVR8515 STK-500 kit, Virtex-5 FPGA Board Projects Undertaken M.Tech ... - 2015 Aug 25
... Platform Tools Cadence Virtuoso Design Suite Microcontroller 8051, AVR 8515 Microprocessor 8085, 8086, ADSP 2181 Design Kits FPGA Spartan III Starter Board,FPGA Spartan III-E kit, AVR8515 STK-500 kit, Virtex-5 FPGA Board Projects Undertaken M.Tech ... - 2015 Aug 25
Project Security
Pune, MH, India
... In real time application speed and accuracy is important so FPGA is used for controlling and processing. Paper Published : •"RFID security and Privacy" in National Conference on Advances In Networking, Embedded System And Communication ANEC-2015 • ... - 2015 Aug 07
... In real time application speed and accuracy is important so FPGA is used for controlling and processing. Paper Published : •"RFID security and Privacy" in National Conference on Advances In Networking, Embedded System And Communication ANEC-2015 • ... - 2015 Aug 07
All desired subject of ENTC
Pune, MH, India
... 8051(Assembly and C language) Software MATLAB, Multisim, Actel Libro, Turbo C, Xillinx BE Project Title Convolution encoding and decoding Based On FPGA Using VHDL Location JSPM’S Rajarshi Shahu College of Engineering,Pune-33 [Pune University]. ... - 2015 Aug 05
... 8051(Assembly and C language) Software MATLAB, Multisim, Actel Libro, Turbo C, Xillinx BE Project Title Convolution encoding and decoding Based On FPGA Using VHDL Location JSPM’S Rajarshi Shahu College of Engineering,Pune-33 [Pune University]. ... - 2015 Aug 05